Inventor · disambiguated record
Eula A. Tolentino
Also filed as: TOLENTINO EULA A
11 granted patents·1 pending application·6 citations·filing 2015–2018
82Inventor score
Technology areasG06F
Files withIBM12
Top patents by PatentIndex Score
12 records- 0184US9870045B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2016·Granted Jan 16, 2018·3 cites·7 claims
- 0282US9921833B2Determining of validity of speculative load data after a predetermined period of time in a multi-slice processorIBM·Filed 2015·Granted Mar 20, 2018·3 cites·11 claims
- 0360US10564691B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2017·Granted Feb 18, 2020·0 cites·14 claims
- 0460US10209757B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2017·Granted Feb 19, 2019·0 cites·7 claims
- 0559US10838728B2Parallel slice processor shadowing states of hardware threads across execution slicesIBM·Filed 2018·Granted Nov 17, 2020·0 cites·18 claims
- 0657US10528347B2Executing system call vectored instructions in a multi-slice processorIBM·Filed 2018·Granted Jan 7, 2020·0 cites·11 claims
- 0757US10102001B2Parallel slice processor shadowing states of hardware threads across execution slicesIBM·Filed 2018·Granted Oct 16, 2018·0 cites·18 claims
- 0856US9870039B2Reducing power consumption in a multi-slice computer processorIBM·Filed 2015·Granted Jan 16, 2018·0 cites·14 claims
- 0954US10048963B2Executing system call vectored instructions in a multi-slice processorIBM·Filed 2016·Granted Aug 14, 2018·0 cites·17 claims
- 1052US9928073B2Determining of validity of speculative load data after a predetermined period of time in a multi-slice processorIBM·Filed 2016·Granted Mar 27, 2018·0 cites·6 claims
- 1144US10296337B2Preventing premature reads from a general purpose registerIBM·Filed 2016·Granted May 21, 2019·0 cites·17 claims
- 1235US2018004527A1Operation of a multi-slice processor implementing prioritized dependency chain resolutionIBM·Filed 2016·Application pending·0 cites
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