Inventor · disambiguated record
Philip Raymond Germann
Also filed as: GERMANN PHILIP R · GERMANN PHILIP RAYMOND
86 granted patents·18 pending applications·470 citations·filing 2003–2016
99Inventor score
Top patents by PatentIndex Score
104 records- 0195US9739825B2Residual material detection in backdrilled stubsIBM·Filed 2016·Granted Aug 22, 2017·6 cites·16 claims
- 0293US9488690B2Residual material detection in backdrilled stubsIBM·Filed 2014·Granted Nov 8, 2016·8 cites·10 claims
- 0393US9341670B2Residual material detection in backdrilled stubsIBM·Filed 2014·Granted May 17, 2016·13 cites·10 claims
- 0492US7342816B2Daisy chainable memory chipIBM·Filed 2006·Granted Mar 11, 2008·27 cites·20 claims
- 0591US7496711B2Multi-level memory architecture with data prioritizationIBM·Filed 2006·Granted Feb 24, 2009·26 cites·19 claims
- 0689US8492903B2Through silicon via direct FET signal gatingBARTLEY GERALD K·Filed 2011·Granted Jul 23, 2013·10 cites·10 claims
- 0789US7952478B2Capacitance-based microchip exploitation detectionIBM·Filed 2008·Granted May 31, 2011·20 cites·20 claims
- 0888US7884625B2Capacitance structures for defeating microchip tamperingIBM·Filed 2008·Granted Feb 8, 2011·16 cites·20 claims
- 0985US7707379B2Dynamic latency map for memory optimizationIBM·Filed 2007·Granted Apr 27, 2010·14 cites·18 claims
- 1084US7202685B1Embedded probe-enabling socket with integral probe structuresIBM·Filed 2005·Granted Apr 10, 2007·12 cites·9 claims
- 1183US8642456B2Implementing semiconductor signal-capable capacitors with deep trench and TSV technologiesBARTLEY GERALD K·Filed 2012·Granted Feb 4, 2014·6 cites·8 claims
- 1283US8519304B2Implementing selective rework for chip stacks and silicon carrier assembliesBARTLEY GERALD KEITH·Filed 2010·Granted Aug 27, 2013·6 cites·9 claims
- 1383US7838336B2Method and structure for dispensing chip underfill through an opening in the chipIBM·Filed 2007·Granted Nov 23, 2010·10 cites·6 claims
- 1483US7317401B2Method and mechanical tamper-evident case fastenerIBM·Filed 2005·Granted Jan 8, 2008·12 cites·20 claims
- 1582US8466024B2Power domain controller with gated through silicon via having FET with horizontal channelBARTLEY GERALD K·Filed 2010·Granted Jun 18, 2013·6 cites·2 claims
- 1682US7675164B2Method and structure for connecting, stacking, and cooling chips on a flexible carrierIBM·Filed 2007·Granted Mar 9, 2010·10 cites·15 claims
- 1782US7345900B2Daisy chained memory systemIBM·Filed 2006·Granted Mar 18, 2008·13 cites·22 claims
- 1881US7074050B1Socket assembly with incorporated memory structureIBM·Filed 2005·Granted Jul 11, 2006·19 cites·14 claims
- 1980US8823090B2Field-effect transistor and method of creating sameBARTLEY GERALD K·Filed 2011·Granted Sep 2, 2014·5 cites·11 claims
- 2080US7345901B2Computer system having daisy chained self timed memory chipsIBM·Filed 2006·Granted Mar 18, 2008·12 cites·20 claims
- 2179US7822936B2Memory chip for high capacity memory subsystem supporting replication of command dataIBM·Filed 2007·Granted Oct 26, 2010·9 cites·20 claims
- 2279US7701244B2False connection for defeating microchip exploitationIBM·Filed 2008·Granted Apr 20, 2010·8 cites·20 claims
- 2377US7954081B2Implementing enhanced wiring capability for electronic laminate packagesIBM·Filed 2008·Granted May 31, 2011·6 cites·10 claims
- 2476US7809913B2Memory chip for high capacity memory subsystem supporting multiple speed busIBM·Filed 2007·Granted Oct 5, 2010·7 cites·10 claims
- 2576US7088200B2Method and structure to control common mode impedance in fan-out regionsIBM·Filed 2004·Granted Aug 8, 2006·11 cites·13 claims
- 2675US8079134B2Method of enhancing on-chip inductance structure utilizing silicon through via technologyMAKI ANDREW BENSON·Filed 2008·Granted Dec 20, 2011·9 cites·1 claims
- 2775US7996641B2Structure for hub for supporting high capacity memory subsystemIBM·Filed 2008·Granted Aug 9, 2011·7 cites·14 claims
- 2874US9003559B2Continuity check monitoring for microchip exploitation detectionBARTLEY GERALD K·Filed 2008·Granted Apr 7, 2015·6 cites·18 claims
- 2974US8491739B2Implementing interleaved-dielectric joining of multi-layer laminatesGERMANN PHILIP R·Filed 2010·Granted Jul 23, 2013·3 cites·9 claims
- 3074US7725762B2Implementing redundant memory access using multiple controllers on the same bank of memoryIBM·Filed 2007·Granted May 25, 2010·6 cites·17 claims
- 3174US7667487B2Techniques for providing switchable decoupling capacitors for an integrated circuitIBM·Filed 2008·Granted Feb 23, 2010·6 cites·19 claims
- 3274US7627711B2Memory controller for daisy chained memory chipsIBM·Filed 2006·Granted Dec 1, 2009·6 cites·5 claims
- 3373US9207275B2Interconnect solder bumps for die testingIBM·Filed 2012·Granted Dec 8, 2015·3 cites·19 claims
- 3473US8172140B2Doped implant monitoring for microchip tamper detectionBARTLEY GERALD K·Filed 2008·Granted May 8, 2012·5 cites·20 claims
- 3573US8108647B2Digital data architecture employing redundant links in a daisy chain of component modulesBARTLEY GERALD KEITH·Filed 2009·Granted Jan 31, 2012·6 cites·20 claims
- 3673US7480201B2Daisy chainable memory chipIBM·Filed 2007·Granted Jan 20, 2009·8 cites·1 claims
- 3771US7673093B2Computer system having daisy chained memory chipsIBM·Filed 2006·Granted Mar 2, 2010·5 cites·1 claims
- 3871US7546410B2Self timed memory chip having an apportionable data busIBM·Filed 2006·Granted Jun 9, 2009·5 cites·3 claims
- 3970US9281261B2Intelligent chip placement within a three-dimensional chip stackIBM·Filed 2014·Granted Mar 8, 2016·2 cites·2 claims
- 4070US7553696B2Method for implementing component placement suspended within grid array packages for enhanced electrical performanceIBM·Filed 2006·Granted Jun 30, 2009·4 cites·7 claims
- 4170US7402912B2Method and power control structure for managing plurality of voltage islandsIBM·Filed 2005·Granted Jul 22, 2008·3 cites·3 claims
- 4269US6757175B1Method and embedded bus bar structure for implementing power distributionIBM·Filed 2003·Granted Jun 29, 2004·13 cites·12 claims
- 4368US8174103B2Enhanced architectural interconnect options enabled with flipped die on a multi-chip packageBARTLEY GERALD KEITH·Filed 2008·Granted May 8, 2012·4 cites·1 claims
- 4468US7620763B2Memory chip having an apportionable data busIBM·Filed 2006·Granted Nov 17, 2009·4 cites·13 claims
- 4568US7036710B1Method and structures for implementing impedance-controlled coupled noise suppressor for differential interface solder column arrayIBM·Filed 2004·Granted May 2, 2006·12 cites·9 claims
- 4667US7921264B2Dual-mode memory chip for high capacity memory subsystemIBM·Filed 2007·Granted Apr 5, 2011·4 cites·17 claims
- 4766US8332659B2Signal quality monitoring to defeat microchip exploitationBARTLEY GERALD K·Filed 2008·Granted Dec 11, 2012·3 cites·19 claims
- 4865US8796578B2Implementing selective rework for chip stacks and silicon carrier assembliesIBM·Filed 2013·Granted Aug 5, 2014·1 cites·4 claims
- 4964US7818512B2High capacity memory subsystem architecture employing hierarchical tree configuration of memory modulesIBM·Filed 2007·Granted Oct 19, 2010·3 cites·18 claims
- 5064US7472360B2Method for implementing enhanced wiring capability for electronic laminate packagesIBM·Filed 2006·Granted Dec 30, 2008·2 cites·4 claims
Showing the top 50 of 104 patent records by PatentIndex Score.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →