Inventor · disambiguated record
Theodore R. Staplin, Jr.
Also filed as: STAPLIN JR THEODORE R
11 granted patents·320 citations·filing 1979–1990
92Inventor score
Technology areasG06F
Top patents by PatentIndex Score
11 records- 0192US4300193AData processing system having data multiplex control apparatusHONEYWELL INF SYSTEMS·Filed 1979·Granted Nov 10, 1981·82 cites·20 claims
- 0281US4495571AData processing system having synchronous bus wait/retry cycleHONEYWELL INF SYSTEMS·Filed 1982·Granted Jan 22, 1985·59 cites·16 claims
- 0377US4321665AData processing system having centralized data alignment for I/O controllersHONEYWELL INF SYSTEMS·Filed 1979·Granted Mar 23, 1982·37 cites·6 claims
- 0469US4293908AData processing system having direct memory access bus cycleHONEYWELL INF SYSTEMS·Filed 1979·Granted Oct 6, 1981·29 cites·11 claims
- 0562US5230065AApparatus and method for a data processing system having a peer relationship among a plurality of central processing unitsBULL HN INFORMATION SYST·Filed 1990·Granted Jul 20, 1993·48 cites·20 claims
- 0659US4292668AData processing system having data multiplex control bus cycleHONEYWELL INF SYSTEMS·Filed 1979·Granted Sep 29, 1981·20 cites·16 claims
- 0751US4383295AData processing system having data entry backspace character apparatusHONEYWELL INF SYSTEMS·Filed 1979·Granted May 10, 1983·15 cites·12 claims
- 0840US4615016AApparatus for performing simplified decimal multiplication by stripping leading zeroesHONEYWELL INF SYSTEMS·Filed 1983·Granted Sep 30, 1986·11 cites·4 claims
- 0935US4727486AHardware demand fetch cycle system interfaceHONEYWELL INF SYSTEMS·Filed 1986·Granted Feb 23, 1988·7 cites·12 claims
- 1035US4604722ADecimal arithmetic logic unit for doubling or complementing decimal operandHONEYWELL INF SYSTEMS·Filed 1983·Granted Aug 5, 1986·7 cites·3 claims
- 1130US4608659AArithmetic logic unit with outputs indicating invalid computation results caused by invalid operandsHONEYWELL INF SYSTEMS·Filed 1983·Granted Aug 26, 1986·5 cites·6 claims
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