Inventor
HASSOUN JOSEPH H
US30 patents
⚠️ This page may combine multiple inventors who share the name “HASSOUN JOSEPH H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SAMSUNG ELECTRONICS CO LTD
18 patentsUS11775801B2Oct 3, 2023
Neural processor
SAMSUNG ELECTRONICS CO LTD1 citations72
US11775802B2Oct 3, 2023
Neural processor
SAMSUNG ELECTRONICS CO LTD1 citations72
US11880760B2Jan 23, 2024
Mixed-precision NPU tile with depth-wise convolution
SAMSUNG ELECTRONICS CO LTD2 citations71
US11775611B2Oct 3, 2023
Piecewise quantization for neural networks
SAMSUNG ELECTRONICS CO LTD3 citations69
US12314833B2May 27, 2025
Neural processor
SAMSUNG ELECTRONICS CO LTD0 citations62
US12086700B2Sep 10, 2024
Neural processor
SAMSUNG ELECTRONICS CO LTD0 citations62
US12073302B2Aug 27, 2024
Neural processor
SAMSUNG ELECTRONICS CO LTD0 citations62
US12015429B2Jun 18, 2024
Hardware channel-parallel data compression/decompression
SAMSUNG ELECTRONICS CO LTD0 citations62
US11775256B2Oct 3, 2023
Signed multiplication using unsigned multiplier with dynamic fine-grained operand isolation
SAMSUNG ELECTRONICS CO LTD0 citations62
US11671111B2Jun 6, 2023
Hardware channel-parallel data compression/decompression
SAMSUNG ELECTRONICS CO LTD0 citations62
US12400108B2Aug 26, 2025
Mixed-precision neural network accelerator tile with lattice fusion
SAMSUNG ELECTRONICS CO LTD0 citations61
US12099912B2Sep 24, 2024
Neural processor
SAMSUNG ELECTRONICS CO LTD0 citations60
US12524656B2Jan 13, 2026
Depthwise-convolution implementation on a neural processing core
SAMSUNG ELECTRONICS CO LTD0 citations52
US12423566B2Sep 23, 2025
SRAM-sharing for reconfigurable neural processing units
SAMSUNG ELECTRONICS CO LTD0 citations52
US11861328B2Jan 2, 2024
Processor for fine-grain sparse integer and floating-point operations
SAMSUNG ELECTRONICS CO LTD0 citations52
US12361266B2Jul 15, 2025
Hierarchical weight preprocessing for neural network accelerator
SAMSUNG ELECTRONICS CO LTD0 citations50
US12216735B2Feb 4, 2025
Supporting floating point 16 (FP16) in dot product architecture
SAMSUNG ELECTRONICS CO LTD0 citations50
US12182577B2Dec 31, 2024
Neural-processing unit tile for shuffling queued nibbles for multiplication with non-zero weight nibbles
SAMSUNG ELECTRONICS CO LTD0 citations50
XILINX INC
8 patentsUS6289068B1Sep 11, 2001
Delay lock loop with clock phase shifter
XILINX INC169 citations99
US6487648B1Nov 26, 2002
SDRAM controller implemented in a PLD
XILINX INC92 citations98
US6525565B2Feb 25, 2003
Double data rate flip-flop
XILINX INC43 citations96
US6204710B1Mar 20, 2001
Precision trim circuit for delay lines
XILINX INC85 citations96
US6061418AMay 9, 2000
Variable clock divider with selectable duty cycle
XILINX INC61 citations96
US6777980B2Aug 17, 2004
Double data rate flip-flop
XILINX INC29 citations92
US6587534B2Jul 1, 2003
Delay lock loop with clock phase shifter
XILINX INC21 citations92
US7317773B2Jan 8, 2008
Double data rate flip-flop
XILINX INC11 citations84