Inventor
SRIVASTAVA DURGESH
US28 patents
⚠️ This page may combine multiple inventors who share the name “SRIVASTAVA DURGESH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
24 patentsUS7725757B2May 25, 2010
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP75 citations94
US12192023B2Jan 7, 2025
Page-based remote memory access using system memory interface network device
INTEL CORP4 citations85
US7555597B2Jun 30, 2009
Direct cache access in multiple core processors
INTEL CORP9 citations84
US10324525B2Jun 18, 2019
Context aware selective backlighting techniques
INTEL CORP4 citations80
US12192024B2Jan 7, 2025
Shared memory
INTEL CORP1 citations75
US12381751B2Aug 5, 2025
Direct memory access (DMA) engine with network interface capabilities
INTEL CORP2 citations74
US11573722B2Feb 7, 2023
Tenant based allocation for pooled memory
INTEL CORP2 citations72
US7475269B2Jan 6, 2009
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP6 citations72
US11397464B2Jul 26, 2022
Context aware selective backlighting techniques
INTEL CORP1 citations69
US10976815B2Apr 13, 2021
Context aware selective backlighting techniques
INTEL CORP1 citations69
US12132581B2Oct 29, 2024
Network interface controller with eviction cache
INTEL CORP0 citations62
US11983408B2May 14, 2024
Ballooning for multi-tiered pooled memory
INTEL CORP0 citations62
US11681439B2Jun 20, 2023
Ballooning for multi-tiered pooled memory
INTEL CORP0 citations62
US7571341B2Aug 4, 2009
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP3 citations61
US7272736B2Sep 18, 2007
Method and system for fast frequency switch for a power throttle in an integrated device
INTEL CORP2 citations61
US8024594B2Sep 20, 2011
Method and apparatus for reducing power consumption in multi-channel memory controller systems
INTEL CORP4 citations60
US11726565B2Aug 15, 2023
Context aware selective backlighting techniques
INTEL CORP0 citations59
US12417121B2Sep 16, 2025
Memory pool management
INTEL CORP0 citations58
US12579073B2Mar 17, 2026
Apparatus and method for intelligent memory page management
INTEL CORP0 citations56
US12373335B2Jul 29, 2025
Memory thin provisioning using memory pools
INTEL CORP0 citations51
US12443537B2Oct 14, 2025
Method to minimize hot/cold page detection overhead on running workloads
INTEL CORP0 citations50
US12375390B2Jul 29, 2025
Memory pooled time sensitive networking based architectures
INTEL CORP0 citations50
US12086446B2Sep 10, 2024
Memory and storage pool interfaces
INTEL CORP0 citations50
US7861053B2Dec 28, 2010
Supporting un-buffered memory modules on a platform configured for registered memory modules
INTEL CORP0 citations39