Inventor · disambiguated record
Chuen Khiang Wang
Also filed as: WANG CHUEN KHIANG
11 granted patents·3 pending applications·47 citations·filing 2004–2017
88Inventor score
Files withUNITED TEST & ASSEMBLY CT LT3UNITED TEST & ASSEMBLY CT LTD3NG CATHERINE BEE LIANG2UTAC HEADQUARTERS PTE LTD2UTAC UNITED TEST AND ASSEMBLY2
Top patents by PatentIndex Score
14 records- 0190US8716873B2Semiconductor packages and methods of packaging semiconductor devicesWANG CHUEN KHIANG·Filed 2011·Granted May 6, 2014·19 cites·27 claims
- 0288US9136142B2Semiconductor packages and methods of packaging semiconductor devicesUNITED TEST & ASSEMBLY CT LT·Filed 2014·Granted Sep 15, 2015·7 cites·24 claims
- 0381US8829666B2Semiconductor packages and methods of packaging semiconductor devicesNG CATHERINE BEE LIANG·Filed 2011·Granted Sep 9, 2014·8 cites·20 claims
- 0479US9589875B2Semiconductor packages and methods of packaging semiconductor devicesUTAC HEADQUARTERS PTE LTD·Filed 2015·Granted Mar 7, 2017·2 cites·20 claims
- 0569US7723833B2Stacked die packagesUNITED TEST & ASSEMBLY CT LTD·Filed 2007·Granted May 25, 2010·5 cites·18 claims
- 0668US8916422B2Semiconductor packages and methods of packaging semiconductor devicesUNITED TEST & ASSEMBLY CT LT·Filed 2013·Granted Dec 23, 2014·2 cites·23 claims
- 0758US7816775B2Multi-die IC package and manufacturing methodUNITED TEST & ASSEMBLY CT LTD·Filed 2005·Granted Oct 19, 2010·2 cites·14 claims
- 0857US8860079B2Semiconductor packages and methods of packaging semiconductor devicesNG CATHERINE BEE LIANG·Filed 2012·Granted Oct 14, 2014·1 cites·20 claims
- 0956US9881863B2Semiconductor packages and methods of packaging semiconductor devicesUTAC HEADQUARTERS PTE LTD·Filed 2017·Granted Jan 30, 2018·0 cites·20 claims
- 1054US9391026B2Semiconductor packages and methods of packaging semiconductor devicesUNITED TEST & ASSEMBLY CT LT·Filed 2014·Granted Jul 12, 2016·0 cites·20 claims
- 1146US7678610B2Semiconductor chip package and method of manufactureUTAC UNITED TEST AND ASSEMBLY·Filed 2005·Granted Mar 16, 2010·1 cites·10 claims
- 1238US2008251938A1Semiconductor chip package and method of manufactureUTAC UNITED TEST AND ASSEMBLY·Filed 2008·Application pending·0 cites
- 1334US2008290509A1Chip Scale Package and Method of Assembling the SameUNITED TEST AND ASSEMBLY CT·Filed 2004·Application pending·0 cites
- 1433US2007132081A1Multiple stacked die window csp package and method of manufactureUNITED TEST & ASSEMBLY CT LTD·Filed 2005·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →