Inventor

CHOI JU-IL

KR68 patents

⚠️ This page may combine multiple inventors who share the name “CHOI JU-IL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOI JU-IL

SAMSUNG ELECTRONICS CO LTD

Wafer-to-wafer bonding structure

Semiconductor package

Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices

Semiconductor devices with solder-based connection terminals and method of forming the same

Electrical interconnection structures including stress buffer layers

Methods of forming integrated circuit chips having vertically extended through-substrate vias therein and chips formed thereby

Semiconductor devices and methods of manufacturing the same

Semiconductor devices having hybrid stacking structures and methods of fabricating the same

Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same

Semiconductor devices and semiconductor packages including the same

Semiconductor packages having first and second redistribution patterns

Semiconductor package

Semiconductor device

Methods for fabricating semiconductor devices having through electrodes

Integrated circuit devices including through-silicon-vias having integral contact pads

Semiconductor device including interconnection structure including copper and tin and semiconductor package including the same

Semiconductor device and method of fabricating the same

Method of forming semiconductor chips, the semiconductor chips so formed and chip-stack package having the same

Wafer-level stack package and method of fabricating the same

Semiconductor packages

Semiconductor devices and semiconductor packages including the same

Semiconductor devices including through-silicon-vias and methods of manufacturing the same and semiconductor packages including the semiconductor devices

Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices

Semiconductor devices and semiconductor packages including the same

Semiconductor devices including through-silicon-vias and methods of manufacturing the same and semiconductor packages including the semiconductor devices

Semiconductor devices, semiconductor packages, and methods of manufacturing the semiconductor devices

Integrated circuit device including through-silicon via structure and method of manufacturing the same

Semiconductor devices having through silicon vias and methods of fabricating the same

Semiconductor package and method of fabricating the same

Interconnection structure and semiconductor package including the same

Semiconductor device

Semiconductor package

Method of fabricating a semiconductor device

Semiconductor package

Semiconductor package including fine redistribution patterns

Semiconductor package

Interconnection structure and semiconductor package including the same

Semiconductor device having a through silicon via and methods of manufacturing the same

Semiconductor device

Integrated circuit device and method of manufacturing the same

Semiconductor device having a through silicon via and methods of manufacturing the same

Integrated circuit device and method of manufacturing the same

Semiconductor device and semiconductor package including the same

LEE HO-JIN

Integrated circuit chips having vertically extended through-substrate vias therein

Methods of forming integrated circuit chips having vertically extended through-substrate vias therein

PHEE JAE-HYUN

Semiconductor devices having electrodes

CHOI JU-IL

Integrated circuit devices having through-silicon vias and methods of manufacturing such devices

MA KEUM-HEE

Multi-chip package having semiconductor chips of different thicknesses from each other and related device

CHOI JU IL

Integrated circuit device including through-silicon via structure and method of manufacturing the same

JO CHA-JEA

Method of manufacturing a chip stack package