Inventor · disambiguated record
Javier Carretero Casado
Also filed as: CARRETERO CASADO JAVIER
9 granted patents·2 pending applications·18 citations·filing 2011–2017
82Inventor score
Top patents by PatentIndex Score
11 records- 0180US9112537B2Content-aware caches for reliabilityRAMIREZ TANAUSU·Filed 2011·Granted Aug 18, 2015·8 cites·22 claims
- 0272US9043659B2Banking of reliability metricsINTEL CORP·Filed 2012·Granted May 26, 2015·3 cites·17 claims
- 0371US10528473B2Disabling cache portions during low voltage operationsINTEL CORP·Filed 2017·Granted Jan 7, 2020·1 cites·13 claims
- 0467US9176895B2Increased error correction for cache memories through adaptive replacement policiesINTEL CORP·Filed 2013·Granted Nov 3, 2015·2 cites·17 claims
- 0564US9940686B2Exploiting frame to frame coherency in a sort-middle architectureINTEL CORP·Filed 2014·Granted Apr 10, 2018·1 cites·32 claims
- 0662US9286172B2Fault-aware mapping for shared last level cache (LLC)RAMIREZ TANAUSU·Filed 2011·Granted Mar 15, 2016·3 cites·24 claims
- 0754US9904977B2Exploiting frame to frame coherency in a sort-middle architectureINTEL CORP·Filed 2016·Granted Feb 27, 2018·0 cites·40 claims
- 0853US9922393B2Exploiting frame to frame coherency in a sort-middle architectureINTEL CORP·Filed 2015·Granted Mar 20, 2018·0 cites·13 claims
- 0953US9374542B2Image signal processor with a block checking circuitINTEL CORP·Filed 2014·Granted Jun 21, 2016·0 cites·20 claims
- 1049US2016342495A1Register error protection through binary translationINTEL CORP·Filed 2016·Application pending·0 cites
- 1148US2017201459A1Traffic control on an on-chip networkINTEL CORP·Filed 2017·Application pending·0 cites
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