Inventor · disambiguated record
Charles H. Stewart
Also filed as: STEWART CHARLES H
12 granted patents·485 citations·filing 1988–2018
93Inventor score
Files withLSI LOGIC CORP6GEN MOTORS CORP4SWIFT ENERGY COMPANY1VERISILICON MICROELECTRONICS SHANGHAI CO LTD1
Top patents by PatentIndex Score
12 records- 0197USD323806SVehicle wheel segmentGEN MOTORS CORP·Filed 1990·Granted Feb 11, 1992·89 cites·1 claims
- 0296USD336742SVehicle wheelGEN MOTORS CORP·Filed 1991·Granted Jun 22, 1993·67 cites·1 claims
- 0394USD310989SWheel coverGEN MOTORS CORP·Filed 1988·Granted Oct 2, 1990·67 cites·1 claims
- 0494USD310811SWheel coverGEN MOTORS CORP·Filed 1988·Granted Sep 25, 1990·68 cites·1 claims
- 0589US5321612AMethod for exploring for hydrocarbons utilizing three dimensional modeling of thermal anomaliesSWIFT ENERGY COMPANY·Filed 1991·Granted Jun 14, 1994·97 cites·29 claims
- 0678US11163564B1Vector compare and store instruction that stores index values to memoryVERISILICON MICROELECTRONICS SHANGHAI CO LTD·Filed 2018·Granted Nov 2, 2021·4 cites·20 claims
- 0777US6959376B1Integrated circuit containing multiple digital signal processorsLSI LOGIC CORP·Filed 2001·Granted Oct 25, 2005·27 cites·20 claims
- 0876US6687773B1Bridge for coupling digital signal processor to on-chip bus as masterLSI LOGIC CORP·Filed 2001·Granted Feb 3, 2004·25 cites·22 claims
- 0974US6789153B1Bridge for coupling digital signal processor to on-chip bus as slaveLSI LOGIC CORP·Filed 2001·Granted Sep 7, 2004·22 cites·27 claims
- 1067US6735677B1Parameterizable queued memory access systemLSI LOGIC CORP·Filed 2001·Granted May 11, 2004·13 cites·35 claims
- 1155US6961844B1System and method for extracting instruction boundaries in a fetched cacheline, given an arbitrary offset within the cachelineLSI LOGIC CORP·Filed 2001·Granted Nov 1, 2005·5 cites·22 claims
- 1250US6963961B1Increasing DSP efficiency by independent issuance of store address and dataLSI LOGIC CORP·Filed 2001·Granted Nov 8, 2005·1 cites·27 claims
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