Inventor · disambiguated record
Dilip K. Bhavsar
Also filed as: BHAVSAR DILIP K · BHAVSAR DILIP KANTILAL
9 granted patents·1 pending application·728 citations·filing 1982–2006
92Inventor score
Files withCOMPAQ COMPUTER CORP3DIGITAL EQUIPMENT CORP3BHAVSAR DILIP K1COMPAQ INFORMATION TECHNOLOGIE1GEN ELECTRIC1
Top patents by PatentIndex Score
10 records- 0197US5627842AArchitecture for system-wide standardized intra-module and inter-module fault testingDIGITAL EQUIPMENT CORP·Filed 1996·Granted May 6, 1997·246 cites·25 claims
- 0295US4498172ASystem for polynomial division self-testing of digital networksGEN ELECTRIC·Filed 1982·Granted Feb 5, 1985·187 cites·11 claims
- 0391US6408401B1Embedded RAM with self-test and self-repair with spare rows and columnsCOMPAQ INFORMATION TECHNOLOGIE·Filed 1998·Granted Jun 18, 2002·102 cites·29 claims
- 0489US4669061AScannable flip-flopDIGITAL EQUIPMENT CORP·Filed 1984·Granted May 26, 1987·54 cites·8 claims
- 0577US6286116B1Built-in test method for content addressable memoriesCOMPAQ COMPUTER CORP·Filed 1999·Granted Sep 4, 2001·42 cites·20 claims
- 0676US6163864AMethod for cost-effective production testing of input voltage levels of the forwarded clock interface of high performance integrated circuitsCOMPAQ COMPUTER CORP·Filed 1998·Granted Dec 19, 2000·44 cites·7 claims
- 0768US6779142B1Apparatus and method for interfacing a high speed scan-path with slow-speed test equipmentHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Aug 17, 2004·14 cites·53 claims
- 0863US6260166B1Observability register architecture for efficient production test and debugCOMPAQ COMPUTER CORP·Filed 1998·Granted Jul 10, 2001·29 cites·16 claims
- 0941US6076176AEncoding of failing bit addresses to facilitate multi-bit failure detect using a wired-OR schemeDIGITAL EQUIPMENT CORP·Filed 1998·Granted Jun 13, 2000·10 cites·13 claims
- 1037US2008098269A1Mechanism for concurrent testing of multiple embedded arraysBHAVSAR DILIP K·Filed 2006·Application pending·0 cites
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