Inventor · disambiguated record
Christopher B. Wilkerson
Also filed as: WILKERSON CHRISTOPHER · WILKERSON CHRISTOPHER B
83 granted patents·23 pending applications·661 citations·filing 1997–2024
99Inventor score
Files withINTEL CORP64KEPLER COMPUTING INC23WILKERSON CHRISTOPHER6WILKERSON CHRISTOPHER B2ALAMELDEEN ALAA R1
Top patents by PatentIndex Score
106 records- 0199US12243797B13D stack of split graphics processing logic diesKEPLER COMPUTING INC·Filed 2021·Granted Mar 4, 2025·5 cites·20 claims
- 0299US12079475B1Ferroelectric memory chiplet in a multi-dimensional packagingKEPLER COMPUTING INC·Filed 2021·Granted Sep 3, 2024·13 cites·11 claims
- 0399US11899613B1Method and apparatus to process an instruction for a distributed logic having tightly coupled accelerator core and processor core in a multi-dimensional packagingKEPLER COMPUTING INC·Filed 2021·Granted Feb 13, 2024·6 cites·20 claims
- 0499US11829699B1Method to segregate logic and memory into separate dies for thermal management in a multi-dimensional packagingKEPLER COMPUTING INC·Filed 2021·Granted Nov 28, 2023·5 cites·20 claims
- 0599US11791233B1Ferroelectric or paraelectric memory and logic chiplet with thermal management in a multi-dimensional packagingKEPLER COMPUTING INC·Filed 2021·Granted Oct 17, 2023·8 cites·20 claims
- 0699US11694940B13D stack of accelerator die and multi-core processor dieKEPLER COMPUTING INC·Filed 2021·Granted Jul 4, 2023·45 cites·20 claims
- 0799US11670352B1Apparatus and method for endurance of non-volatile memory banks via wear leveling and outlier compensationKEPLER COMPUTING INC·Filed 2021·Granted Jun 6, 2023·7 cites·20 claims
- 0898US12086410B1Ferroelectric memory chiplet in a multi-dimensional packaging with I/O switch embedded in a substrate or interposerKEPLER COMPUTING INC·Filed 2021·Granted Sep 10, 2024·7 cites·20 claims
- 0998US12026034B1Method and apparatus for heuristic-based power gating of non-CMOS logic and CMOS based logicKEPLER COMPUTING INC·Filed 2021·Granted Jul 2, 2024·3 cites·21 claims
- 1098US12019492B1Method and apparatus for managing power in a multi-dimensional packagingKEPLER COMPUTING INC·Filed 2021·Granted Jun 25, 2024·3 cites·18 claims
- 1198US12001266B1Method and apparatus for managing power of ferroelectric or paraelectric logic and CMOS based logicKEPLER COMPUTING INC·Filed 2021·Granted Jun 4, 2024·3 cites·19 claims
- 1298US11841757B1Method and apparatus for cycle-by-cycle clock gating of ferroelectric or paraelectric logic and CMOS based logicKEPLER COMPUTING INC·Filed 2021·Granted Dec 12, 2023·3 cites·17 claims
- 1398US11844223B1Ferroelectric memory chiplet as unified memory in a multi-dimensional packagingKEPLER COMPUTING INC·Filed 2021·Granted Dec 12, 2023·8 cites·20 claims
- 1498US11816036B2Method and system for performing data movement operations with read snapshot and in place write updateINTEL CORP·Filed 2022·Granted Nov 14, 2023·11 cites·25 claims
- 1598US11295796B1Apparatus and method for endurance of non-volatile memory banks via wear leveling and random swap injectionKEPLER COMPUTING INC·Filed 2021·Granted Apr 5, 2022·6 cites·20 claims
- 1697US8966345B2Selective error correction in memory to reduce power consumptionINTEL CORP·Filed 2012·Granted Feb 24, 2015·52 cites·23 claims
- 1795US10019360B2Hardware predictor using a cache line demotion instruction to reduce performance inversion in core-to-core data transfersINTEL CORP·Filed 2015·Granted Jul 10, 2018·14 cites·15 claims
- 1894US11823725B1Apparatus and method for endurance of non-volatile memory banks via multi-level wear levelingKEPLER COMPUTING INC·Filed 2021·Granted Nov 21, 2023·2 cites·20 claims
- 1994US11790969B1Apparatus and method for endurance of non-volatile memory banks via outlier compensationKEPLER COMPUTING INC·Filed 2021·Granted Oct 17, 2023·2 cites·20 claims
- 2094US9703708B2System and method for thread scheduling on reconfigurable processor coresINTEL CORP·Filed 2013·Granted Jul 11, 2017·25 cites·18 claims
- 2194US8640005B2Method and apparatus for using cache memory in a system that supports a low power stateWILKERSON CHRISTOPHER B·Filed 2010·Granted Jan 28, 2014·39 cites·22 claims
- 2293US11373727B1Apparatus for improving memory bandwidth through read and restore decouplingKEPLER COMPUTING INC·Filed 2021·Granted Jun 28, 2022·2 cites·20 claims
- 2392US9921972B2Method and apparatus for implementing a heterogeneous memory subsystemINTEL CORP·Filed 2016·Granted Mar 20, 2018·8 cites·19 claims
- 2491US9472248B2Method and apparatus for implementing a heterogeneous memory subsystemINTEL CORP·Filed 2014·Granted Oct 18, 2016·14 cites·22 claims
- 2590US10496544B2Aggregated write back in a direct mapped two level memoryINTEL CORP·Filed 2016·Granted Dec 3, 2019·7 cites·22 claims
- 2690US9583182B1Multi-level memory managementINTEL CORP·Filed 2016·Granted Feb 28, 2017·9 cites·21 claims
- 2789US10606755B2Method and system for performing data movement operations with read snapshot and in place write updateINTEL CORP·Filed 2017·Granted Mar 31, 2020·5 cites·21 claims
- 2889US8291168B2Disabling cache portions during low voltage operationsWILKERSON CHRISTOPHER·Filed 2011·Granted Oct 16, 2012·12 cites·20 claims
- 2987US11327894B2Method and system for performing data movement operations with read snapshot and in place write updateINTEL CORP·Filed 2020·Granted May 10, 2022·2 cites·9 claims
- 3087US10102134B2Instruction and logic for run-time evaluation of multiple prefetchersINTEL CORP·Filed 2016·Granted Oct 16, 2018·5 cites·20 claims
- 3186US11875836B2Apparatus and method for endurance of non-volatile memory banks via wear leveling with linear indexingKEPLER COMPUTING INC·Filed 2021·Granted Jan 16, 2024·1 cites·22 claims
- 3286US11869562B1Apparatus and method for endurance of non-volatile memory banks via wear leveling in a round robin fashionKEPLER COMPUTING INC·Filed 2021·Granted Jan 9, 2024·1 cites·18 claims
- 3386US10452551B2Programmable memory prefetcher for prefetching multiple cache lines based on data in a prefetch engine control registerINTEL CORP·Filed 2016·Granted Oct 22, 2019·5 cites·18 claims
- 3485US11366589B1Efficient method for improving memory bandwidth through read and restore decoupling using restore bufferKEPLER COMPUTING INC·Filed 2021·Granted Jun 21, 2022·1 cites·20 claims
- 3584US9417879B2Systems and methods for managing reconfigurable processor coresINTEL CORP·Filed 2013·Granted Aug 16, 2016·6 cites·19 claims
- 3683US12308064B1Random swap injectionKEPLER COMPUTING INC·Filed 2023·Granted May 20, 2025·0 cites·14 claims
- 3783US9223710B2Read-write partitioning of cache memoryINTEL CORP·Filed 2013·Granted Dec 29, 2015·11 cites·15 claims
- 3881US10024916B2Sequential circuit with error detectionINTEL CORP·Filed 2017·Granted Jul 17, 2018·2 cites·20 claims
- 3981US8103830B2Disabling cache portions during low voltage operationsWILKERSON CHRISTOPHER·Filed 2008·Granted Jan 24, 2012·9 cites·20 claims
- 4080US10521236B2Branch prediction based on coherence operations in processorsINTEL CORP·Filed 2018·Granted Dec 31, 2019·2 cites·20 claims
- 4180US6662273B1Least critical used replacement with critical cacheINTEL CORP·Filed 2000·Granted Dec 9, 2003·28 cites·38 claims
- 4277US9378021B2Instruction and logic for run-time evaluation of multiple prefetchersCHISHTI ZESHAN A·Filed 2014·Granted Jun 28, 2016·4 cites·20 claims
- 4377US6957304B2Runahead allocation protection (RAP)INTEL CORP·Filed 2000·Granted Oct 18, 2005·23 cites·31 claims
- 4475US10007620B2System and method for cache replacement using conservative set duelingINTEL CORP·Filed 2016·Granted Jun 26, 2018·2 cites·20 claims
- 4575US6779108B2Incorporating trigger loads in branch histories for branch predictionINTEL CORP·Filed 2000·Granted Aug 17, 2004·20 cites·37 claims
- 4674US9678878B2Disabling cache portions during low voltage operationsWILKERSON CHRISTOPHER·Filed 2012·Granted Jun 13, 2017·3 cites·5 claims
- 4774US8452946B2Methods and apparatuses for efficient load processing using buffersLIU WEI·Filed 2009·Granted May 28, 2013·5 cites·15 claims
- 4872US6760816B1Critical loads guided data prefetchingINTEL CORP·Filed 2000·Granted Jul 6, 2004·17 cites·35 claims
- 4971US11373728B1Method for improving memory bandwidth through read and restore decouplingKEPLER COMPUTING INC·Filed 2021·Granted Jun 28, 2022·0 cites·20 claims
- 5071US10528473B2Disabling cache portions during low voltage operationsINTEL CORP·Filed 2017·Granted Jan 7, 2020·1 cites·13 claims
Showing the top 50 of 106 patent records by PatentIndex Score.
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