Inventor · disambiguated record
William Burroughs
Also filed as: BURROUGHS WILLIAM · BURROUGHS WILLIAM G
34 granted patents·3 pending applications·440 citations·filing 1986–2024
97Inventor score
Top patents by PatentIndex Score
37 records- 0195US11575607B2Dynamic load balancing for multi-core computing environmentsINTEL CORP·Filed 2020·Granted Feb 7, 2023·7 cites·33 claims
- 0292US8515965B2Concurrent linked-list traversal for real-time hash processing in multi-core, multi-thread network processorsMITAL DEEPAK·Filed 2012·Granted Aug 20, 2013·24 cites·18 claims
- 0392US8321385B2Hash processing in a network communications processor architectureBURROUGHS WILLIAM·Filed 2011·Granted Nov 27, 2012·37 cites·25 claims
- 0492US6535948B1Serial interface unitAGERE SYSTEMS INC·Filed 2000·Granted Mar 18, 2003·114 cites·42 claims
- 0590US10445271B2Multi-core communication acceleration using hardware queue deviceINTEL CORP·Filed 2016·Granted Oct 15, 2019·7 cites·19 claims
- 0687US8910168B2Task backpressure and deletion in a multi-flow network processor architectureLSI CORP·Filed 2012·Granted Dec 9, 2014·11 cites·20 claims
- 0786US8949838B2Multi-threaded processing with hardware acceleratorsMITAL DEEPAK·Filed 2012·Granted Feb 3, 2015·14 cites·32 claims
- 0885US10216668B2Technologies for a distributed hardware queue managerINTEL CORP·Filed 2016·Granted Feb 26, 2019·5 cites·29 claims
- 0984US9152564B2Early cache eviction in a multi-flow network processor architectureINTEL CORP·Filed 2012·Granted Oct 6, 2015·8 cites·20 claims
- 1084US8537832B2Exception detection and thread rescheduling in a multi-core, multi-thread network processorPIROG JERRY·Filed 2011·Granted Sep 17, 2013·11 cites·14 claims
- 1182US9154442B2Concurrent linked-list traversal for real-time hash processing in multi-core, multi-thread network processorsINTEL CORP·Filed 2013·Granted Oct 6, 2015·7 cites·13 claims
- 1282US9081742B2Network communications processor architectureSONNIER DAVID P·Filed 2010·Granted Jul 14, 2015·6 cites·8 claims
- 1380US5517147AMultiple-phase clock signal generator for integrated circuits, comprising PLL, counter, and logic circuitsUNISYS CORP·Filed 1994·Granted May 14, 1996·37 cites·18 claims
- 1479US12375408B2Dynamic load balancing for multi-core computing environmentsINTEL CORP·Filed 2024·Granted Jul 29, 2025·0 cites·20 claims
- 1579US12309067B2Hardware queue scheduling for multi-core computing environmentsINTEL CORP·Filed 2020·Granted May 20, 2025·1 cites·25 claims
- 1678US8868889B2Instruction breakpoints in a multi-core, multi-thread network communications processor architectureMITAL DEEPAK·Filed 2010·Granted Oct 21, 2014·6 cites·16 claims
- 1777US8539199B2Hash processing in a network communications processor architectureBURROUGHS WILLIAM·Filed 2011·Granted Sep 17, 2013·6 cites·20 claims
- 1877US8505013B2Reducing data read latency in a network communications processor architecturePOLLOCK STEVEN·Filed 2010·Granted Aug 6, 2013·8 cites·20 claims
- 1976US6076136ARAM address decoding system and method to support misaligned memory accessLUCENT TECHNOLOGIES INC·Filed 1998·Granted Jun 13, 2000·40 cites·18 claims
- 2074US10929323B2Multi-core communication acceleration using hardware queue deviceINTEL CORP·Filed 2019·Granted Feb 23, 2021·1 cites·25 claims
- 2173US12289239B2Dynamic load balancing for multi-core computing environmentsINTEL CORP·Filed 2023·Granted Apr 29, 2025·0 cites·20 claims
- 2271US7389368B1Inter-DSP signaling in a multiple DSP environmentAGERE SYSTEMS INC·Filed 2000·Granted Jun 17, 2008·18 cites·29 claims
- 2368US10552205B2Work conserving, load balancing, and schedulingINTEL CORP·Filed 2016·Granted Feb 4, 2020·1 cites·14 claims
- 2468US9094219B2Network processor having multicasting protocolLSI CORP·Filed 2013·Granted Jul 28, 2015·2 cites·20 claims
- 2566US6691190B1Inter-DSP data exchange in a multiple DSP environmentAGERE SYSTEMS INC·Filed 2000·Granted Feb 10, 2004·13 cites·28 claims
- 2662US11709702B2Work conserving, load balancing, and schedulingINTEL CORP·Filed 2020·Granted Jul 25, 2023·0 cites·21 claims
- 2761US8873550B2Task queuing in a multi-flow network processor architectureLSI CORP·Filed 2012·Granted Oct 28, 2014·1 cites·20 claims
- 2855US4773041ASystem for executing a sequence of operation codes with some codes being executed out of order in a pipeline parallel processorUNISYS CORP·Filed 1986·Granted Sep 20, 1988·23 cites·4 claims
- 2952US5133124AMethod for compacting recyclable plastic containersBURROUGHS WILLIAM G·Filed 1990·Granted Jul 28, 1992·16 cites·32 claims
- 3051US2014258759A1System and method for de-queuing an active queueLSI CORP·Filed 2013·Application pending·0 cites
- 3146US11134021B2Techniques for processor queue managementINTEL CORP·Filed 2016·Granted Sep 28, 2021·0 cites·23 claims
- 3246US9864633B2Network processor having multicasting protocolINTEL CORP·Filed 2015·Granted Jan 9, 2018·0 cites·20 claims
- 3344US10437638B2Method and apparatus for dynamically balancing task processing while maintaining task orderINTEL CORP·Filed 2017·Granted Oct 8, 2019·0 cites·25 claims
- 3441US8677075B2Memory manager for a network communications processor architectureMITAL DEEPAK·Filed 2012·Granted Mar 18, 2014·0 cites·20 claims
- 3541US5613133AMicrocode loading with continued program executionUNISYS CORP·Filed 1994·Granted Mar 18, 1997·16 cites·20 claims
- 3640US2020004584A1Hardware Queue Manager for Scheduling Requests in a ProcessorBURROUGHS WILLIAM·Filed 2018·Application pending·0 cites
- 3739US2019007318A1Technologies for inflight packet count limiting in a queue manager environmentINTEL CORP·Filed 2017·Application pending·0 cites
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