Inventor · disambiguated record
John T. Rusterholz
Also filed as: RUSTERHOLZ JOHN T
11 granted patents·1 pending application·715 citations·filing 1984–2006
93Inventor score
Technology areasG06F
Top patents by PatentIndex Score
12 records- 0191US4945479ATightly coupled scientific processing systemUNISYS CORP·Filed 1985·Granted Jul 31, 1990·207 cites·29 claims
- 0291US4873630AScientific processor to support a host processor referencing common memoryUNISYS CORP·Filed 1985·Granted Oct 10, 1989·153 cites·26 claims
- 0376US5696693AMethod for placing logic functions and cells in a logic design using floor planning by analogyUNISYS CORP·Filed 1995·Granted Dec 9, 1997·89 cites·39 claims
- 0474US5634113AMethod for generating a preferred processing order and for detecting cycles in a directed graph used to represent system component connectivityUNISYS CORP·Filed 1994·Granted May 27, 1997·66 cites·23 claims
- 0573US4858115ALoop control mechanism for scientific processorUNISYS CORP·Filed 1985·Granted Aug 15, 1989·50 cites·13 claims
- 0668US4706191ALocal store for scientific vector processorSPERRY CORP·Filed 1985·Granted Nov 10, 1987·43 cites·14 claims
- 0760US5912820AMethod and apparatus for distributing a clock tree within a hierarchical circuit designUNISYS CORP·Filed 1997·Granted Jun 15, 1999·38 cites·33 claims
- 0855US4839845AMethod and apparatus for performing a vector reductionUNISYS CORP·Filed 1986·Granted Jun 13, 1989·25 cites·3 claims
- 0948US5781903ASystem and method for reordering lookup table entries when table address bits are invertedCADENCE DESIGN SYSTEMS INC·Filed 1996·Granted Jul 14, 1998·22 cites·14 claims
- 1045US4691279AInstruction buffer for a digital data processing systemUNISYS CORP·Filed 1984·Granted Sep 1, 1987·14 cites·11 claims
- 1143US2008155224A1System and method for performing input/output operations on a data processing platform that supports multiple memory page sizesUNISYS CORP·Filed 2006·Application pending·0 cites
- 1235US5864838ASystem and method for reordering lookup table entries when table address bits are reorderedCADENCE DESIGN SYSTEMS INC·Filed 1996·Granted Jan 26, 1999·8 cites·19 claims
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