Inventor · disambiguated record
Christophe Gauthron
Also filed as: GAUTHRON CHRISTOPHE · GAUTHRON CHRISTOPHE G
11 granted patents·1 pending application·235 citations·filing 1995–2016
91Inventor score
Files withMENTOR GRAPHICS CORP4SEAWRIGHT JAMES ANDREW GARRARD3LEVITT JEREMY RUTLEDGE2VLSI TECHNOLOGY INC2LEVITT JEREMY R1
Top patents by PatentIndex Score
12 records- 0193US6848088B1Measure of analysis performed in property checkingMENTOR GRAPHICS CORP·Filed 2002·Granted Jan 25, 2005·69 cites·10 claims
- 0286US7890897B2Measure of analysis performed in property checkingMENTOR GRAPHICS CORP·Filed 2007·Granted Feb 15, 2011·11 cites·23 claims
- 0385US8418121B2Measure of analysis performed in property checkingLEVITT JEREMY RUTLEDGE·Filed 2011·Granted Apr 9, 2013·7 cites·21 claims
- 0485US7454324B1Selection of initial states for formal verificationSEAWRIGHT JAMES ANDREW GARRARD·Filed 2003·Granted Nov 18, 2008·57 cites·18 claims
- 0576US5638290AMethod for eliminating a false critical path in a logic circuitVLSI TECHNOLOGY INC·Filed 1995·Granted Jun 10, 1997·38 cites·4 claims
- 0675US7318205B2Measure of analysis performed in property checkingLEVITT JEREMY RUTLEDGE·Filed 2004·Granted Jan 8, 2008·15 cites·26 claims
- 0770US7487483B2Clock model for formal verification of a digital circuit descriptionSEAWRIGHT JAMES ANDREW GARRARD·Filed 2006·Granted Feb 3, 2009·5 cites·6 claims
- 0868US9262557B2Measure of analysis performed in property checkingMENTOR GRAPHICS CORP·Filed 2013·Granted Feb 16, 2016·1 cites·5 claims
- 0957US9684760B2Measure of analysis performed in property checkingMENTOR GRAPHICS CORP·Filed 2016·Granted Jun 20, 2017·0 cites·18 claims
- 1057US8060847B2Clock model for formal verification of a digital circuit descriptionSEAWRIGHT JAMES ANDREW GARRARD·Filed 2008·Granted Nov 15, 2011·1 cites·11 claims
- 1154US5481469AAutomatic power vector generation for sequential circuitsVLSI TECHNOLOGY INC·Filed 1995·Granted Jan 2, 1996·31 cites·1 claims
- 1237US2007299648A1Reuse of learned information to simplify functional verification of a digital circuitLEVITT JEREMY R·Filed 2003·Application pending·0 cites
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