Inventor · disambiguated record
Donald E. Hawk
Also filed as: HAWK DONALD E · HAWK DONALD E JR · HAWK JR DONALD E · HAWK JR DONALD EARL
9 granted patents·4 pending applications·74 citations·filing 2000–2015
86Inventor score
Files withAGERE SYSTEMS INC5HAWK DONALD E2LSI CORP2AGERE SYST GUARDIAN CORP1AVAGO TECHNOLOGIES GENERAL IP1
Top patents by PatentIndex Score
13 records- 0174US8736076B2Multi-chip stacking of integrated circuit devices using partial device overlapHAWK DONALD E·Filed 2012·Granted May 27, 2014·5 cites·20 claims
- 0274US6790760B1Method of manufacturing an integrated circuit packageAGERE SYSTEMS INC·Filed 2000·Granted Sep 14, 2004·23 cites·16 claims
- 0371US6476472B1Integrated circuit package with improved ESD protection for no-connect pinsAGERE SYSTEMS INC·Filed 2000·Granted Nov 5, 2002·21 cites·9 claims
- 0468US6465882B1Integrated circuit package having partially exposed conductive layerAGERE SYST GUARDIAN CORP·Filed 2000·Granted Oct 15, 2002·16 cites·13 claims
- 0561US7271485B1Systems and methods for distributing I/O in a semiconductor deviceAGERE SYSTEMS INC·Filed 2006·Granted Sep 18, 2007·3 cites·18 claims
- 0657US7709861B2Systems and methods for supporting a subset of multiple interface types in a semiconductor deviceAGERE SYSTEMS INC·Filed 2007·Granted May 4, 2010·2 cites·20 claims
- 0750US8370777B2Method of generating a leadframe IC package model, a leadframe modeler and an IC design systemLSI CORP·Filed 2009·Granted Feb 5, 2013·1 cites·16 claims
- 0846US7429703B2Methods and apparatus for integrated circuit device power distribution via internal wire bondsAGERE SYSTEMS INC·Filed 2003·Granted Sep 30, 2008·3 cites·20 claims
- 0941US8627256B2Method for computing IO redistribution routingHAWK DONALD E·Filed 2011·Granted Jan 7, 2014·0 cites·26 claims
- 1041US2014131854A1Multi-chip module connection by way of bridging blocksLSI CORP·Filed 2012·Application pending·0 cites
- 1140US2007164446A1Integrated circuit having second substrate to facilitate core power and ground distributionHAWK DONALD E JR·Filed 2006·Application pending·0 cites
- 1239US2013154109A1Method of lowering capacitances of conductive apertures and an interposer capable of being reverse biased to achieve reduced capacitanceVENKATRAMAN RAMNATH·Filed 2011·Application pending·0 cites
- 1328US2016260662A1Systems and Methods for Main Distribution on an Integrated CircuitAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →