Inventor · disambiguated record
Taejin Pyon
Also filed as: PYON TAEJIN
6 granted patents·6 citations·filing 2015–2021
72Inventor score
Top patents by PatentIndex Score
6 records- 0170US11119910B2Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segmentsSPIN MEMORY INC·Filed 2019·Granted Sep 14, 2021·2 cites·15 claims
- 0268US9281028B1Method and circuit for glitch reduction in memory read latch circuitORACLE INT CORP·Filed 2015·Granted Mar 8, 2016·3 cites·20 claims
- 0363US11586553B2Error cache system with coarse and fine segments for power optimizationINTEGRATED SILICON SOLUTION CAYMAN INC·Filed 2021·Granted Feb 21, 2023·0 cites·20 claims
- 0460US10546625B2Method of optimizing write voltage based on error buffer occupancySPIN MEMORY INC·Filed 2018·Granted Jan 28, 2020·1 cites·21 claims
- 0558US11580014B2Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segmentsINTEGRATED SILICON SOLUTION CAYMAN INC·Filed 2021·Granted Feb 14, 2023·0 cites·20 claims
- 0655US11119936B2Error cache system with coarse and fine segments for power optimizationSPIN MEMORY INC·Filed 2019·Granted Sep 14, 2021·0 cites·20 claims
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