Inventor · disambiguated record
Russell W. Guenthner
Also filed as: GUENTHNER RUSSELL W · GUENTHNER RUSSELL WAYNE
38 granted patents·13 pending applications·704 citations·filing 1979–2014
98Inventor score
Files withBULL HN INFORMATION SYST19HONEYWELL INF SYSTEMS9GUENTHNER RUSSELL W7BULL HN INFORMATION SYSTEMS INC2GUENTHNER CYNTHIA S2
Top patents by PatentIndex Score
51 records- 0187US4594660ACollectorHONEYWELL INF SYSTEMS·Filed 1982·Granted Jun 10, 1986·81 cites·19 claims
- 0286US8495732B2Entering an identifier with security improved by time based randomization of input stepsGUENTHNER RUSSELL W·Filed 2008·Granted Jul 23, 2013·16 cites·11 claims
- 0383US4707784APrioritized secondary use of a cache with simultaneous accessHONEYWELL BULL·Filed 1986·Granted Nov 17, 1987·77 cites·1 claims
- 0479US4594659AMethod and apparatus for prefetching instructions for a central execution pipeline unitHONEYWELL INF SYSTEMS·Filed 1982·Granted Jun 10, 1986·70 cites·20 claims
- 0576US8370820B2Method and apparatus for enabling parallel processing during execution of a Cobol source program using two-stage compilationGUENTHNER CYNTHIA S·Filed 2009·Granted Feb 5, 2013·12 cites·16 claims
- 0674US4527238ACache with independent addressable data and directory arraysHONEYWELL INF SYSTEMS·Filed 1983·Granted Jul 2, 1985·44 cites·4 claims
- 0772US4551799AVerification of real page numbers of stack stored prefetched instructions from instruction cacheHONEYWELL INF SYSTEMS·Filed 1983·Granted Nov 5, 1985·40 cites·2 claims
- 0871US9182962B2Method for translating a cobol source program into readable and maintainable program code in an object oriented second programming languageKNEISEL TODD BRADLEY·Filed 2011·Granted Nov 10, 2015·6 cites·4 claims
- 0971US7809547B2Host computer system emulating target system legacy software and providing for incorporating more powerful application program elements into the flow of the legacy softwareGUENTHNER RUSSELL W·Filed 2005·Granted Oct 5, 2010·7 cites·21 claims
- 1070US4628489ADual address RAMHONEYWELL INF SYSTEMS·Filed 1983·Granted Dec 9, 1986·20 cites·4 claims
- 1166US10366299B2Sorting/scanning system camera upgrade apparatus with backwards compatibilityBULL HN INFORMATION SYSTEMS INC·Filed 2012·Granted Jul 30, 2019·5 cites·24 claims
- 1266US8869126B2Method and apparatus enabling multi threaded program execution for a Cobol program including OpenMP directives by utilizing a two-stage compilation processGUENTHNER CYNTHIA S·Filed 2012·Granted Oct 21, 2014·3 cites·11 claims
- 1365US5435000ACentral processing unit using dual basic processing units and combined result busBULL HN INFORMATION SYST·Filed 1993·Granted Jul 18, 1995·46 cites·12 claims
- 1464US8856759B2Method and apparatus providing COBOL decimal type arithmetic functions with improved performanceGUENTHNER RUSSELL W·Filed 2010·Granted Oct 7, 2014·2 cites·9 claims
- 1563US6199156B1System for explicitly referencing a register for its current content when performing processor context switchBULL HN INFORMATION SYST·Filed 1998·Granted Mar 6, 2001·44 cites·20 claims
- 1663US5590301AAddress transformation in a cluster computer systemBULL HN INFORMATION SYST·Filed 1995·Granted Dec 31, 1996·48 cites·12 claims
- 1757US4471432AMethod and apparatus for initiating the execution of instructions using a central pipeline execution unitWILHITE JOHN E·Filed 1982·Granted Sep 11, 1984·25 cites·10 claims
- 1856US7684973B2Performance improvement for software emulation of central processor unit utilizing signal handlerBULL HN INFORMATION SYST·Filed 2005·Granted Mar 23, 2010·1 cites·5 claims
- 1956US4538238AMethod and apparatus for calculating the residue of a signed binary numberHONEYWELL INF SYSTEMS·Filed 1983·Granted Aug 27, 1985·20 cites·12 claims
- 2055US4573116AMultiword data register array having simultaneous read-write capabilityHONEYWELL INF SYSTEMS·Filed 1983·Granted Feb 25, 1986·22 cites·4 claims
- 2153US6938145B2Associative memory system with a multi-digit incrementable validity counterBULL HN INFORMATION SYST·Filed 2002·Granted Aug 30, 2005·3 cites·26 claims
- 2250US9754222B2Method for summarized viewing of large numbers of performance metrics while retaining cognizance of potentially significant deviationsBULL HN INFORMATION SYSTEMS INC·Filed 2013·Granted Sep 5, 2017·0 cites·9 claims
- 2350US2014137122A1Modified backfill scheduler and a method employing frequency control to reduce peak cluster power requirementsEGOLF DAVID A·Filed 2012·Application pending·0 cites
- 2449US7314491B2Encapsulation of large native operating system functions as enhancements of the instruction set in an emulated central processor systemBULL HN INFORMATION SYST·Filed 2004·Granted Jan 1, 2008·4 cites·17 claims
- 2549US2016191743A1Method and system for linking, attaching and retrieving video clips on postcardsBULL HN INFORMATION SYST·Filed 2014·Application pending·0 cites
- 2647US2016188351A1Process for providing increased power on demand in a computer processing system with submodelingBULL HN INFORMATION SYST·Filed 2014·Application pending·0 cites
- 2746US7406406B2Instructions to load and store containing words in a computer system emulator with host word size larger than that of emulated machineBULL HN INFORMATION SYST·Filed 2004·Granted Jul 29, 2008·0 cites·15 claims
- 2845US5263034AError detection in the basic processing unit of a VLSI central processorBULL INFORMATION SYSTEMS INC·Filed 1990·Granted Nov 16, 1993·19 cites·5 claims
- 2945US5195101AEfficient error detection in a vlsi central processing unitBULL HN INFORMATION SYST·Filed 1990·Granted Mar 16, 1993·18 cites·9 claims
- 3045US2013246158A1Postal mail to electronic communication and related methodsCANNON PATRICK JERALD·Filed 2012·Application pending·0 cites
- 3144US7689403B2Instructions providing new functionality for utilization by a target system program of host system container words during computer system emulation with host word size larger than that of the emulated machineBULL HN·Filed 2008·Granted Mar 30, 2010·0 cites·3 claims
- 3244US5276862ASafestore frame implementation in a central processorBULL HN INFORMATION SYST·Filed 1991·Granted Jan 4, 1994·16 cites·5 claims
- 3344US2006020926A1Detecting and accounting for unknown external interruptions in a computer program environmentBOHULT STEFAN R·Filed 2004·Application pending·0 cites
- 3443US2016179573A1Method for providing mainframe style batch job processing on a modern computer systemBULL HN INFORMATION SYST·Filed 2014·Application pending·0 cites
- 3542US6442676B1Processor with different width functional units ignoring extra bits of bus wider than instruction widthBULL HN INFORMATION SYST·Filed 1999·Granted Aug 27, 2002·14 cites·17 claims
- 3642US2015254902A1Bringing mail to life via mobile systems and methodsMACIA CARLOS·Filed 2014·Application pending·0 cites
- 3741US2005097485A1Method for improving performance of critical path in field programmable gate arraysFiled 2003·Application pending·0 cites
- 3841US2007010987A1Lookahead instruction fetch processing for improved emulated instruction performanceGUENTHNER RUSSELL W·Filed 2005·Application pending·0 cites
- 3941US2007100825A1Process for sorting large lists on a 64-bit computing platformGUENTHNER RUSSELL W·Filed 2005·Application pending·0 cites
- 4041US2007156387A1Reliability improvement using signal handler for fault recovery in software emulatorGUENTHNER RUSSELL W·Filed 2005·Application pending·0 cites
- 4139US2002181215A1Midplane circuit board assemblyFiled 2002·Application pending·0 cites
- 4237US4359689AClock pulse driverHONEYWELL INF SYSTEMS·Filed 1980·Granted Nov 16, 1982·3 cites·8 claims
- 4336US5408651AStore "undo" for cache store error recoveryBULL HN INFORMATION SYST·Filed 1993·Granted Apr 18, 1995·11 cites·4 claims
- 4436US2007156386A1Linearization of page based memory for increased performance in a software emulated central processing unitGUENTHNER RUSSELL W·Filed 2005·Application pending·0 cites
- 4534US8930925B2Method for enabling compilation of a Cobol source program utilizing a two-stage compilation process, the Cobol source program including a mix of Cobol, C++ or JAVA statements, and optional OpenMP directivesGUENTHNER RUSSELL WAYNE·Filed 2012·Granted Jan 6, 2015·0 cites·7 claims
- 4634US5644761ABasic operations synchronization and local mode controller in a VLSI central processorBULL HN INFORMATION SYST·Filed 1992·Granted Jul 1, 1997·7 cites·9 claims
- 4733US6014757AFast domain switch and error recovery in a secure CPU architectureBULL HN INFORMATION SYST·Filed 1997·Granted Jan 11, 2000·6 cites·36 claims
- 4832US4298952AOne's complement adderHONEYWELL INF SYSTEMS·Filed 1979·Granted Nov 3, 1981·6 cites·5 claims
- 4931US6230256B1Data processing system having a bus wider than processor instruction widthBULL HN INFORMATION SYST·Filed 1999·Granted May 8, 2001·2 cites·20 claims
- 5031US5367699ACentral processing unit incorporation selectable, precisa ratio, speed of execution deratingBULL HN INFORMATION SYST·Filed 1991·Granted Nov 22, 1994·4 cites·6 claims
Showing the top 50 of 51 patent records by PatentIndex Score.
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