Inventor · disambiguated record
Ji-Jan Chen
Also filed as: CHEN JI-JAN
17 granted patents·1 pending application·60 citations·filing 2007–2021
91Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD7CHUANG YI-LIN2IND TECH RES INST2TSENG NAN-HSIN2CHEN JI-JAN1
Top patents by PatentIndex Score
18 records- 0193US8832511B2Built-in self-test for interposerCHEN JI-JAN·Filed 2011·Granted Sep 9, 2014·25 cites·24 claims
- 0286US8113412B1Methods for detecting defect connections between metal bumpsTSENG NAN-HSIN·Filed 2011·Granted Feb 14, 2012·7 cites·20 claims
- 0383US10256828B2Phase-locked loop monitor circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 9, 2019·3 cites·18 claims
- 0483US9269640B2Repairing monolithic stacked integrated circuits with a redundant layer and lithography processTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Feb 23, 2016·5 cites·16 claims
- 0576US10680627B2Phase-locked loop monitor circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 9, 2020·2 cites·20 claims
- 0675US11025261B2Phase-locked loop monitor circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jun 1, 2021·1 cites·17 claims
- 0771US8863062B2Methods and apparatus for floorplanning and routing co-designCHUANG YI-LIN·Filed 2012·Granted Oct 14, 2014·3 cites·20 claims
- 0871US8707238B2Method to determine optimal micro-bump-probe pad pairing for efficient PGD testing in interposer designsCHUANG YI-LIN·Filed 2012·Granted Apr 22, 2014·3 cites·19 claims
- 0970US8144756B2Jitter measuring system and methodLEE YU·Filed 2008·Granted Mar 27, 2012·7 cites·12 claims
- 1067US8614571B2Apparatus and method for on-chip sampling of dynamic IR voltage dropTSENG NAN-HSIN·Filed 2011·Granted Dec 24, 2013·2 cites·18 claims
- 1164US11411571B2Phase-locked loop monitor circuitTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Aug 9, 2022·0 cites·19 claims
- 1263US8384455B2Apparatus for clock skew compensationIND TECH RES INST·Filed 2011·Granted Feb 26, 2013·2 cites·10 claims
- 1358US10156609B2Device and method for robustness verificationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 18, 2018·0 cites·20 claims
- 1449US9847318B2Monolithic stacked integrated circuits with a redundant layer for repairing defectsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 19, 2017·0 cites·20 claims
- 1547US8051394B2Yield evaluating apparatus and method thereofIND TECH RES INST·Filed 2008·Granted Nov 1, 2011·0 cites·14 claims
- 1643US9766286B2Defect diagnosisTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Sep 19, 2017·0 cites·20 claims
- 1740US9310431B2Diagnosis framework to shorten yield learning cycles of advanced processesLIU YEN-LING·Filed 2012·Granted Apr 12, 2016·0 cites·20 claims
- 1836US2008133990A1Scan Test Data Compression Method And Decoding Apparatus For Multiple-Scan-Chain DesignsLIN SHIH-PING·Filed 2007·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →