Inventor · disambiguated record
James D. Chlipala
Also filed as: CHLIPALA JAMES D
13 granted patents·5 pending applications·249 citations·filing 1989–2012
92Inventor score
Top patents by PatentIndex Score
18 records- 0189US8161431B2Integrated circuit performance enhancement using on-chip adaptive voltage scalingBUONPANE MICHAEL S·Filed 2008·Granted Apr 17, 2012·30 cites·22 claims
- 0284US5025300AIntegrated circuits having improved fusible linksAT & T BELL LAB·Filed 1990·Granted Jun 18, 1991·93 cites·13 claims
- 0383US6700944B1Phase detector for clock and data recoveryAGERE SYSTEMS INC·Filed 2000·Granted Mar 2, 2004·25 cites·24 claims
- 0481US8350589B2Critical-path circuit for performance monitoringAGERE SYSTEMS LLC·Filed 2009·Granted Jan 8, 2013·9 cites·17 claims
- 0580US7218557B1Method and apparatus for adaptive determination of timing signals on a high speed parallel busAGERE SYSTEMS INC·Filed 2005·Granted May 15, 2007·10 cites·25 claims
- 0680US5021362ALaser link blowing in integrateed circuit fabricationAT & T BELL LAB·Filed 1989·Granted Jun 4, 1991·56 cites·6 claims
- 0770US9158359B2Adaptive voltage scaling using a serial interfaceBUONPANE MICHAEL S·Filed 2012·Granted Oct 13, 2015·3 cites·22 claims
- 0866US7174532B2Method of making a semiconductor device by balancing shallow trench isolation stress and optical proximity effectsAGERE SYSTEMS INC·Filed 2004·Granted Feb 6, 2007·14 cites·19 claims
- 0955US8680907B2Delay circuit having reduced duty cycle distortionCHLIPALA JAMES D·Filed 2008·Granted Mar 25, 2014·3 cites·23 claims
- 1054US7366086B2Crosstalk reduction in a backplane employing low-skew clock distributionAGERE SYSTEMS INC·Filed 2004·Granted Apr 29, 2008·5 cites·12 claims
- 1151US8180600B2Input/output buffer information specification (IBIS) model generation for multi-chip modules (MCM) and similar devicesCHLIPALA JAMES D·Filed 2006·Granted May 15, 2012·1 cites·23 claims
- 1248US2010191913A1Reconfiguration of embedded memory having a multi-level cacheAGERE SYSTEMS INC·Filed 2009·Application pending·0 cites
- 1347US8773160B2Critical-path circuit for performance monitoringAGERE SYSTEMS LLC·Filed 2012·Granted Jul 8, 2014·0 cites·18 claims
- 1446US2010017569A1Pcb including multiple chips sharing an off-chip memory, a method of accessing off-chip memory and a mcm utilizing fewer off-chip memories than chipsAGERE SYSTEMS INC·Filed 2008·Application pending·0 cites
- 1542US2014136128A1Apparatus and method for sensing transistor aging effectsLSI CORP·Filed 2012·Application pending·0 cites
- 1641US7786814B2Method and apparatus for deriving an integrated circuit (IC) clock with a frequency offset from an IC system clockAGERE SYSTEMS INC·Filed 2008·Granted Aug 31, 2010·0 cites·19 claims
- 1740US2014132303A1Apparatus and method for sensing transistor mismatchLSI CORP·Filed 2012·Application pending·0 cites
- 1833US2008129357A1Adaptive Integrated Circuit Clock Skew CorrectionCHLIPALA JAMES D·Filed 2006·Application pending·0 cites
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