Inventor · disambiguated record
Paul I. Zavalney
Also filed as: ZAVALNEY PAUL · ZAVALNEY PAUL I · ZAVALNEY PAUL IVAN
17 granted patents·2 pending applications·31 citations·filing 2010–2024
89Inventor score
Top patents by PatentIndex Score
19 records- 0189US10903838B1Integrated circuit clock management during low power operationsSILICON LAB INC·Filed 2019·Granted Jan 26, 2021·7 cites·25 claims
- 0288US11374600B1System, apparatus and method for mitigating digital interference within radio frequency circuitrySILICON LAB INC·Filed 2021·Granted Jun 28, 2022·2 cites·20 claims
- 0387US8954632B2System method for regulating an input/output interface by sampling during a time duration associated with I/O statesSILICON LAB INC·Filed 2012·Granted Feb 10, 2015·9 cites·19 claims
- 0484US11262786B1Data delay compensator circuitSILICON LAB INC·Filed 2020·Granted Mar 1, 2022·2 cites·20 claims
- 0579US10461787B2Spur mitigation for pulse output drivers in radio frequency (RF) devicesSILICON LAB INC·Filed 2018·Granted Oct 29, 2019·3 cites·22 claims
- 0674US9106176B2Apparatus for motor control system and associated methodsSILICON LAB INC·Filed 2012·Granted Aug 11, 2015·3 cites·20 claims
- 0766US9164936B2System and method for regulating direct memory access descriptor among multiple execution paths by using a link to define order of executionsSILICON LAB INC·Filed 2012·Granted Oct 20, 2015·2 cites·18 claims
- 0862US9083354B2Clock signal timing-based noise suppressionSILICON LAB INC·Filed 2013·Granted Jul 14, 2015·2 cites·19 claims
- 0961US12399844B1Global monitor for multi-port memory controllerSILICON LAB INC·Filed 2024·Granted Aug 26, 2025·0 cites·20 claims
- 1059US9256558B2Direct memory access descriptor-based synchronizationSILICON LAB INC·Filed 2013·Granted Feb 9, 2016·1 cites·16 claims
- 1154US11995007B1Multi-port, multi-protocol varied size RAM controllerSILICON LAB INC·Filed 2022·Granted May 28, 2024·0 cites·18 claims
- 1249US10078600B2Apparatus and method for vector-based signal routingSILICON LAB INC·Filed 2013·Granted Sep 18, 2018·0 cites·19 claims
- 1347US8914624B2Changing the reset state of a processorFERNALD KENNETH W·Filed 2010·Granted Dec 16, 2014·0 cites·22 claims
- 1447US2025279874A1Delay line monitoring to maintain a data eyeSILICON LAB INC·Filed 2024·Application pending·0 cites
- 1545US10180839B2Apparatus for information processing with loop cache and associated methodsSILICON LAB INC·Filed 2016·Granted Jan 15, 2019·0 cites·20 claims
- 1644US10848165B1Performing low power refresh of a digital-to-analog converter circuitSILICON LAB INC·Filed 2019·Granted Nov 24, 2020·0 cites·18 claims
- 1739US8618844B2Level-shifting interface for a processor-based deviceDAVID THOMAS S·Filed 2012·Granted Dec 31, 2013·0 cites·17 claims
- 1837US9817665B2System and technique for retrieving an instruction from memory based on a determination of whether a processor will execute the instructionZAVALNEY PAUL I·Filed 2011·Granted Nov 14, 2017·0 cites·8 claims
- 1937US2017139844A1Asymmetric memorySILICON LAB INC·Filed 2015·Application pending·0 cites
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