Inventor · disambiguated record
Olubunmi O. Adetutu
Also filed as: ADETUTU OLUBUNMI · ADETUTU OLUBUNMI O · ADETUTU OLUBUNMI OLUFEMI
60 granted patents·11 pending applications·2,514 citations·filing 1997–2010
99Inventor score
Files withFREESCALE SEMICONDUCTOR INC40MOTOROLA INC17ADETUTU OLUBUNMI O5HARRISON MICHAEL G1LUO TIEN Y1
Top patents by PatentIndex Score
71 records- 0198US6184072B1Process for forming a high-K gate dielectricMOTOROLA INC·Filed 2000·Granted Feb 6, 2001·224 cites·2 claims
- 0297US7132360B2Method for treating a semiconductor surface to form a metal-containing layerFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Nov 7, 2006·590 cites·33 claims
- 0397US7109079B2Metal gate transistor CMOS process and method for makingFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Sep 19, 2006·71 cites·18 claims
- 0496US7074664B1Dual metal gate electrode semiconductor fabrication process and structure thereofFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Jul 11, 2006·49 cites·7 claims
- 0596US6897095B1Semiconductor process and integrated circuit having dual metal oxide gate dielectric with single metal gate electrodeFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted May 24, 2005·132 cites·23 claims
- 0695US6713381B2Method of forming semiconductor device including interconnect barrier layersMOTOROLA INC·Filed 2002·Granted Mar 30, 2004·135 cites·13 claims
- 0795US6423619B1Transistor metal gate structure that minimizes non-planarity effects and method of formationMOTOROLA INC·Filed 2001·Granted Jul 23, 2002·154 cites·20 claims
- 0895US6369430B1Method of preventing two neighboring contacts from a short-circuit caused by a void between them and device having the sameMOTOROLA INC·Filed 2001·Granted Apr 9, 2002·121 cites·14 claims
- 0993US6849487B2Method for forming an electronic structure using etchMOTOROLA INC·Filed 2003·Granted Feb 1, 2005·93 cites·24 claims
- 1092US7524707B2Modified hybrid orientation technologyFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Apr 28, 2009·19 cites·15 claims
- 1192US7288458B2SOI active layer with different surface orientationFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Oct 30, 2007·21 cites·21 claims
- 1292US6902969B2Process for forming dual metal gate structuresFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Jun 7, 2005·78 cites·24 claims
- 1390US7144825B2Multi-layer dielectric containing diffusion barrier materialFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Dec 5, 2006·55 cites·18 claims
- 1490US7015153B1Method for forming a layer using a purging gas in a semiconductor processFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Mar 21, 2006·56 cites·19 claims
- 1590US6790719B1Process for forming dual metal gate structuresFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Sep 14, 2004·60 cites·24 claims
- 1688US7811891B2Method to control the gate sidewall profile by graded material compositionFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Oct 12, 2010·17 cites·12 claims
- 1786US7579282B2Method for removing metal foot during high-k dielectric/metal gate etchingFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Aug 25, 2009·11 cites·20 claims
- 1886US7297586B2Gate dielectric and metal gate integrationFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Nov 20, 2007·13 cites·17 claims
- 1986US6004850ATantalum oxide anti-reflective coating (ARC) integrated with a metallic transistor gate electrode and method of formationMOTOROLA INC·Filed 1998·Granted Dec 21, 1999·58 cites·23 claims
- 2084US5888588AProcess for forming a semiconductor deviceMOTOROLA INC·Filed 1997·Granted Mar 30, 1999·62 cites·27 claims
- 2183US7981808B2Method of forming a gate dielectric by in-situ plasmaFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted Jul 19, 2011·8 cites·6 claims
- 2283US7651935B2Process of forming an electronic device including active regions and gate electrodes of different compositions overlying the active regionsFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Jan 26, 2010·10 cites·20 claims
- 2383US7402472B2Method of making a nitrided gate dielectricFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Jul 22, 2008·9 cites·11 claims
- 2482US7544575B2Dual metal silicide scheme using a dual spacer processFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Jun 9, 2009·12 cites·20 claims
- 2582US7235502B2Transitional dielectric layer to improve reliability and performance of high dielectric constant transistorsFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Jun 26, 2007·8 cites·12 claims
- 2682US6686282B1Plated metal transistor gate and method of formationMOTOROLA INC·Filed 2003·Granted Feb 3, 2004·30 cites·30 claims
- 2781US7030001B2Method for forming a gate electrode having a metalFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Apr 18, 2006·31 cites·38 claims
- 2881US6376349B1Process for forming a semiconductor device and a conductive structureMOTOROLA INC·Filed 2000·Granted Apr 23, 2002·29 cites·15 claims
- 2980US8426310B2Method of forming a shared contact in a semiconductor deviceADETUTU OLUBUNMI O·Filed 2010·Granted Apr 23, 2013·6 cites·20 claims
- 3080US7037795B1Low RC product transistors in SOI semiconductor processFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted May 2, 2006·26 cites·17 claims
- 3179US7297588B2Electronic device comprising a gate electrode including a metal-containing layer having one or more impurities and a process for forming the sameFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Nov 20, 2007·7 cites·20 claims
- 3278US6268289B1Method for protecting the edge exclusion of a semiconductor wafer from copper plating through use of an edge exclusion masking layerMOTOROLA INC·Filed 1998·Granted Jul 31, 2001·57 cites·26 claims
- 3376US7303983B2ALD gate electrodeFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Dec 4, 2007·6 cites·20 claims
- 3476US6294820B1Metallic oxide gate electrode stack having a metallic gate dielectric metallic gate electrode and a metallic arc layerMOTOROLA INC·Filed 1999·Granted Sep 25, 2001·33 cites·8 claims
- 3575US8125032B2Modified hybrid orientation technologyADETUTU OLUBUNMI O·Filed 2009·Granted Feb 28, 2012·5 cites·20 claims
- 3675US7618902B2Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layerFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Nov 17, 2009·4 cites·20 claims
- 3775US7432164B2Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the sameFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Oct 7, 2008·6 cites·17 claims
- 3872US7045432B2Method for forming a semiconductor device with local semiconductor-on-insulator (SOI)FREESCALE SEMICONDUCTOR INC·Filed 2004·Granted May 16, 2006·14 cites·26 claims
- 3972US5882243AMethod for polishing a semiconductor wafer using dynamic controlMOTOROLA INC·Filed 1997·Granted Mar 16, 1999·34 cites·10 claims
- 4071US6255204B1Method for forming a semiconductor deviceMOTOROLA INC·Filed 1999·Granted Jul 3, 2001·31 cites·19 claims
- 4168US8404594B2Reverse ALDTRIYOSO DINA H·Filed 2005·Granted Mar 26, 2013·4 cites·17 claims
- 4264US7868389B2Electronic device comprising a gate electrode including a metal-containing layer having one or more impuritiesFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Jan 11, 2011·2 cites·20 claims
- 4364US7071038B2Method of forming a semiconductor device having a dielectric layer with high dielectric constantFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Jul 4, 2006·10 cites·36 claims
- 4464US6084279ASemiconductor device having a metal containing layer overlying a gate dielectricMOTOROLA INC·Filed 1997·Granted Jul 4, 2000·31 cites·21 claims
- 4563US5958508AProcess for forming a semiconductor deviceMOTOROLA INC·Filed 1997·Granted Sep 28, 1999·29 cites·20 claims
- 4660US7442621B2Semiconductor process for forming stress absorbent shallow trench isolation structuresFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Oct 28, 2008·10 cites·15 claims
- 4758US8030220B2Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layerFREESCALE SEMICONDUCTOR INC·Filed 2009·Granted Oct 4, 2011·0 cites·17 claims
- 4852US7179700B2Semiconductor device with low resistance contactsFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Feb 20, 2007·5 cites·27 claims
- 4952US6987063B2Method to reduce impurity elements during semiconductor film depositionFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Jan 17, 2006·3 cites·32 claims
- 5051US8659087B2Electronic device with a gate electrode having at least two portionsADETUTU OLUBUNMI O·Filed 2009·Granted Feb 25, 2014·0 cites·20 claims
Showing the top 50 of 71 patent records by PatentIndex Score.
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