Inventor · disambiguated record
John B. Halbert
Also filed as: HALBERT III JOHN B · HALBERT JOHN · HALBERT JOHN B
99 granted patents·13 pending applications·5,471 citations·filing 1989–2024
99Inventor score
Top patents by PatentIndex Score
112 records- 0199US10210925B2Row hammer refresh commandINTEL CORP·Filed 2017·Granted Feb 19, 2019·75 cites·20 claims
- 0299US10083737B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2017·Granted Sep 25, 2018·79 cites·20 claims
- 0399US9865326B2Row hammer refresh commandINTEL CORP·Filed 2016·Granted Jan 9, 2018·83 cites·42 claims
- 0499US9747971B2Row hammer refresh commandINTEL CORP·Filed 2015·Granted Aug 29, 2017·84 cites·46 claims
- 0599US9384821B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2013·Granted Jul 5, 2016·106 cites·15 claims
- 0699US9299400B2Distributed row hammer trackingINTEL CORP·Filed 2012·Granted Mar 29, 2016·72 cites·28 claims
- 0799US9286964B2Method, apparatus and system for responding to a row hammer eventINTEL CORP·Filed 2012·Granted Mar 15, 2016·88 cites·28 claims
- 0899US9236110B2Row hammer refresh commandBAINS KULJIT S·Filed 2012·Granted Jan 12, 2016·65 cites·30 claims
- 0999US9032141B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2012·Granted May 12, 2015·151 cites·23 claims
- 1099US6742098B1Dual-port buffer-to-memory interfaceINTEL CORP·Filed 2000·Granted May 25, 2004·445 cites·20 claims
- 1199US6658509B1Multi-tier point-to-point ring memory interfaceINTEL CORP·Filed 2000·Granted Dec 2, 2003·373 cites·36 claims
- 1299US6487102B1Memory module having buffer for isolating stacked memory devicesINTEL CORP·Filed 2000·Granted Nov 26, 2002·286 cites·26 claims
- 1398US10810079B2Memory device error check and scrub mode and error transparencyINTEL CORP·Filed 2018·Granted Oct 20, 2020·26 cites·29 claims
- 1498US10127101B2Memory device error check and scrub mode and error transparencyINTEL CORP·Filed 2015·Granted Nov 13, 2018·29 cites·23 claims
- 1598US9117544B2Row hammer refresh commandBAINS KULJIT·Filed 2013·Granted Aug 25, 2015·103 cites·15 claims
- 1698US6625687B1Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexingINTEL CORP·Filed 2000·Granted Sep 23, 2003·324 cites·12 claims
- 1798US6553450B1Buffer to multiply memory interfaceINTEL CORP·Filed 2000·Granted Apr 22, 2003·310 cites·23 claims
- 1898US6493250B2Multi-tier point-to-point buffered memory interfaceINTEL CORP·Filed 2000·Granted Dec 10, 2002·223 cites·24 claims
- 1998US6369605B1Self-terminated driver to prevent signal reflections of transmissions between electronic devicesINTEL CORP·Filed 2000·Granted Apr 9, 2002·148 cites·29 claims
- 2098US6317352B1Apparatus for implementing a buffered daisy chain connection between a memory controller and memory modulesINTEL CORP·Filed 2000·Granted Nov 13, 2001·522 cites·10 claims
- 2197US9817714B2Memory device on-die error checking and correcting codeINTEL CORP·Filed 2015·Granted Nov 14, 2017·24 cites·22 claims
- 2297US9721643B2Row hammer monitoring based on stored row hammer threshold valueINTEL CORP·Filed 2016·Granted Aug 1, 2017·20 cites·27 claims
- 2397US8862973B2Method and system for error management in a memory deviceBAINS KULJIT S·Filed 2009·Granted Oct 14, 2014·91 cites·29 claims
- 2497US7260007B2Temperature determination and communication for multiple devices of a memory moduleINTEL CORP·Filed 2005·Granted Aug 21, 2007·96 cites·19 claims
- 2597US7024518B2Dual-port buffer-to-memory interfaceINTEL CORP·Filed 2002·Granted Apr 4, 2006·151 cites·24 claims
- 2697US6747887B2Memory module having buffer for isolating stacked memory devicesINTEL CORP·Filed 2002·Granted Jun 8, 2004·128 cites·5 claims
- 2796US9842021B2Memory device check bit read modeINTEL CORP·Filed 2015·Granted Dec 12, 2017·13 cites·21 claims
- 2896US8938573B2Row hammer condition monitoringGREENFIELD ZVIKA·Filed 2012·Granted Jan 20, 2015·88 cites·14 claims
- 2996US7450456B2Temperature determination and communication for multiple devices of a memory moduleINTEL CORP·Filed 2007·Granted Nov 11, 2008·58 cites·22 claims
- 3096US6820163B1Buffering data transfer between a chipset and memory modulesINTEL CORP·Filed 2000·Granted Nov 16, 2004·118 cites·21 claims
- 3196US6449213B1Memory interface having source-synchronous command/address signalingINTEL CORP·Filed 2000·Granted Sep 10, 2002·115 cites·23 claims
- 3295US9761298B2Method, apparatus and system for responding to a row hammer eventINTEL CORP·Filed 2016·Granted Sep 12, 2017·15 cites·38 claims
- 3395US6928571B1Digital system of adjusting delays on circuit boardsINTEL CORP·Filed 2000·Granted Aug 9, 2005·116 cites·35 claims
- 3495US6530006B1System and method for providing reliable transmission in a buffered memory systemINTEL CORP·Filed 2000·Granted Mar 4, 2003·112 cites·19 claims
- 3594US10496473B2Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC)INTEL CORP·Filed 2017·Granted Dec 3, 2019·11 cites·18 claims
- 3694US10108512B2Validation of memory on-die error correction codeINTEL CORP·Filed 2016·Granted Oct 23, 2018·12 cites·20 claims
- 3793US9564201B2Method, apparatus and system for responding to a row hammer eventINTEL CORP·Filed 2016·Granted Feb 7, 2017·11 cites·33 claims
- 3892US8161356B2Systems, methods, and apparatuses to save memory self-refresh powerBAINS KULJIT S·Filed 2008·Granted Apr 17, 2012·26 cites·24 claims
- 3992US7281079B2Method and apparatus to counter mismatched burst lengthsINTEL CORP·Filed 2003·Granted Oct 9, 2007·78 cites·20 claims
- 4092US6697888B1Buffering and interleaving data transfer between a chipset and memory modulesINTEL CORP·Filed 2000·Granted Feb 24, 2004·75 cites·24 claims
- 4191US11010304B2Memory with reduced exposure to manufacturing related data corruption errorsINTEL CORP·Filed 2018·Granted May 18, 2021·9 cites·17 claims
- 4291US7386765B2Memory device having error checking and correctionINTEL CORP·Filed 2003·Granted Jun 10, 2008·72 cites·12 claims
- 4390US9811420B2Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC)INTEL CORP·Filed 2015·Granted Nov 7, 2017·7 cites·16 claims
- 4490US6996749B1Method and apparatus for providing debug functionality in a buffered memory channelINTEL CORP·Filed 2003·Granted Feb 7, 2006·48 cites·25 claims
- 4589US10572343B2Targeted aliasing single error correction (SEC) codeINTEL CORP·Filed 2018·Granted Feb 25, 2020·10 cites·21 claims
- 4688US6928593B1Memory module and memory component built-in self testINTEL CORP·Filed 2000·Granted Aug 9, 2005·46 cites·64 claims
- 4787US7412627B2Method and apparatus for providing debug functionality in a buffered memory channelINTEL CORP·Filed 2005·Granted Aug 12, 2008·16 cites·25 claims
- 4886US9558066B2Exchanging ECC metadata between memory and host systemBONEN NADAV·Filed 2014·Granted Jan 31, 2017·9 cites·20 claims
- 4986US8385146B2Memory throughput increase via fine granularity of precharge managementINTEL CORP·Filed 2012·Granted Feb 26, 2013·6 cites·24 claims
- 5086US2024379625A1Stacked memory with interface providing offset interconnectsTAHOE RES LTD·Filed 2024·Application pending·0 cites
Showing the top 50 of 112 patent records by PatentIndex Score.
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