Inventor · disambiguated record
Daniel S. Froelich
Also filed as: FROELICH DANIEL · FROELICH DANIEL S
28 granted patents·7 pending applications·30 citations·filing 2003–2024
94Inventor score
Top patents by PatentIndex Score
35 records- 0191US11940483B2Systems, methods and devices for high-speed input/output margin testingTEKTRONIX INC·Filed 2021·Granted Mar 26, 2024·2 cites·25 claims
- 0289US11327861B2Cross-talk generation in a multi-lane link during lane testingINTEL CORP·Filed 2020·Granted May 10, 2022·2 cites·19 claims
- 0388US11782809B2Test and measurement system for analyzing devices under testTEKTRONIX INC·Filed 2021·Granted Oct 10, 2023·2 cites·17 claims
- 0487US10534034B2Interconnect retimer enhancementsINTEL CORP·Filed 2013·Granted Jan 14, 2020·6 cites·23 claims
- 0584US10860449B2Adjustable retimer bufferINTEL CORP·Filed 2017·Granted Dec 8, 2020·3 cites·20 claims
- 0682US10853212B2Cross-talk generation in a multi-lane link during lane testingINTEL CORP·Filed 2018·Granted Dec 1, 2020·3 cites·19 claims
- 0779US11630480B2System, method, and apparatus for SRIS mode selection for PCIeINTEL CORP·Filed 2018·Granted Apr 18, 2023·2 cites·21 claims
- 0879US8395416B2Incorporating an independent logic block in a system-on-a-chipHARRIMAN DAVID J·Filed 2010·Granted Mar 12, 2013·5 cites·21 claims
- 0975US10671476B2In-band margin probing on an operational interconnectINTEL CORP·Filed 2015·Granted Jun 2, 2020·2 cites·20 claims
- 1074US12055584B2Systems, methods, and devices for high-speed input/output margin testingTEKTRONIX INC·Filed 2021·Granted Aug 6, 2024·0 cites·20 claims
- 1173US12216558B2Test and measurement system for analyzing devices under testTEKTRONIX INC·Filed 2023·Granted Feb 4, 2025·0 cites·14 claims
- 1272US11927627B2Systems, methods, and devices for high-speed input/output margin testingTEKTRONIX INC·Filed 2021·Granted Mar 12, 2024·0 cites·18 claims
- 1371US12135581B2System, method, and apparatus for SRIS mode selection for PCIEINTEL CORP·Filed 2022·Granted Nov 5, 2024·0 cites·20 claims
- 1471US9262347B2Method, apparatus and system for measuring latency in a physical unit of a circuitINTEL CORP·Filed 2013·Granted Feb 16, 2016·2 cites·16 claims
- 1569US9558145B2Method, apparatus and system for measuring latency in a physical unit of a circuitINTEL CORP·Filed 2016·Granted Jan 31, 2017·1 cites·17 claims
- 1666US12055603B2Cable condition indicatorTEKTRONIX INC·Filed 2021·Granted Aug 6, 2024·0 cites·24 claims
- 1766US11288154B2Adjustable retimer bufferINTEL CORP·Filed 2020·Granted Mar 29, 2022·0 cites·23 claims
- 1862US11946970B2Systems, methods and devices for high-speed input/output margin testingTEKTRONIX INC·Filed 2020·Granted Apr 2, 2024·0 cites·21 claims
- 1962US11675003B2Interconnect retimer enhancementsINTEL CORP·Filed 2019·Granted Jun 13, 2023·0 cites·25 claims
- 2061US11157350B2In-band margin probing on an operational interconnectINTEL CORP·Filed 2020·Granted Oct 26, 2021·0 cites·28 claims
- 2159US12061232B2Margin test data tagging and predictive expected marginsTEKTRONIX INC·Filed 2021·Granted Aug 13, 2024·0 cites·20 claims
- 2258US12117486B2Systems, methods and devices for high-speed input/output margin testingTEKTRONIX INC·Filed 2020·Granted Oct 15, 2024·0 cites·21 claims
- 2358US10706003B2Reduced pin count interfaceINTEL CORP·Filed 2019·Granted Jul 7, 2020·0 cites·25 claims
- 2456US12504466B2Automated recognition of a device under testTEKTRONIX INC·Filed 2021·Granted Dec 23, 2025·0 cites·18 claims
- 2556US9946683B2Reducing precision timing measurement uncertaintyINTEL CORP·Filed 2014·Granted Apr 17, 2018·0 cites·22 claims
- 2656US9552269B2Test logic for a serial interconnectINTEL CORP·Filed 2014·Granted Jan 24, 2017·0 cites·25 claims
- 2755US12480974B2Multiplexer-enabled cables and test fixturesTEKTRONIX INC·Filed 2021·Granted Nov 25, 2025·0 cites·21 claims
- 2855US9779053B2Physical interface for a serial interconnectINTEL CORP·Filed 2014·Granted Oct 3, 2017·0 cites·25 claims
- 2950US2024391517A1Control Device, in particular Steering Control DeviceBOSCH GMBH ROBERT·Filed 2024·Application pending·0 cites
- 3049US2017235701A1Serial sideband signaling linkINTEL CORP·Filed 2014·Application pending·0 cites
- 3146US2023043022A1Sealing ringFREUDENBERG CARL KG·Filed 2022·Application pending·0 cites
- 3246US2022282791A1Seal ringFREUDENBERG CARL KG·Filed 2022·Application pending·0 cites
- 3344US2004193715A1Scheduling of host-initiated transactionsFiled 2003·Application pending·0 cites
- 3443US2016182257A1Data rate detection to simplify retimer logicINTEL CORP·Filed 2014·Application pending·0 cites
- 3535US2017351640A1Standardized retimerINTEL CORP·Filed 2017·Application pending·0 cites
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