Inventor · disambiguated record
Jar-Ming Ho
Also filed as: HO JAR-MING
26 granted patents·5 pending applications·32 citations·filing 2006–2024
93Inventor score
Top patents by PatentIndex Score
31 records- 0196US12131908B2Semiconductor structure with air gap in pattern-dense region and method of manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2023·Granted Oct 29, 2024·2 cites·8 claims
- 0296US11742209B2Method for preparing semiconductor device with air gap in pattern-dense regionNANYA TECHNOLOGY CORP·Filed 2021·Granted Aug 29, 2023·3 cites·4 claims
- 0396US11309186B2Semiconductor device with air gap in pattern-dense region and method for forming the sameNANYA TECHNOLOGY CORP·Filed 2020·Granted Apr 19, 2022·4 cites·12 claims
- 0485US8278732B1Antifuse element for integrated circuit deviceHO JAR-MING·Filed 2011·Granted Oct 2, 2012·8 cites·10 claims
- 0584US12249512B2Semiconductor structure with air gap in pattern- dense region and method of manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2024·Granted Mar 11, 2025·0 cites·9 claims
- 0683US11133319B2Semiconductor device and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2019·Granted Sep 28, 2021·3 cites·9 claims
- 0782US12500087B2Semiconductor structure with air gap in pattern-dense region and method of manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2023·Granted Dec 16, 2025·0 cites·18 claims
- 0874US8288279B1Method for forming conductive contactHO JAR-MING·Filed 2011·Granted Oct 16, 2012·4 cites·10 claims
- 0974US8178418B1Method for fabricating intra-device isolation structureHO JAR-MING·Filed 2011·Granted May 15, 2012·3 cites·10 claims
- 1071US2025132194A1Semiconductor device structure with liner layer having tapered sidewall and method for preparing the sameNANYA TECHNOLOGY CORP·Filed 2023·Application pending·0 cites
- 1171US2025132193A1Semiconductor device structure with liner layer having tapered sidewall and method for preparing the sameNANYA TECHNOLOGY CORP·Filed 2023·Application pending·0 cites
- 1267US11545431B2Semiconductor device with carbon hard mask and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2020·Granted Jan 3, 2023·0 cites·15 claims
- 1366US11948857B2Semiconductor device with thermal release layer and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2022·Granted Apr 2, 2024·0 cites·14 claims
- 1466US11495516B2Semiconductor device with thermal release layer and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2020·Granted Nov 8, 2022·0 cites·11 claims
- 1565US11776904B2Semiconductor device with carbon hard mask and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2021·Granted Oct 3, 2023·0 cites·8 claims
- 1663US11574914B2Method for fabricating semiconductor device including capacitor structureNANYA TECHNOLOGY CORP·Filed 2021·Granted Feb 7, 2023·0 cites·8 claims
- 1761US12245419B2Method for preparing memory device having protrusion of word lineNANYA TECHNOLOGY CORP·Filed 2022·Granted Mar 4, 2025·0 cites·13 claims
- 1861US7553737B2Method for fabricating recessed-gate MOS transistor deviceNANYA TECHNOLOGY CORP·Filed 2007·Granted Jun 30, 2009·2 cites·10 claims
- 1960US8487397B2Method for forming self-aligned contactHO JAR-MING·Filed 2011·Granted Jul 16, 2013·1 cites·13 claims
- 2059US11978500B2Memory device having protrusion of word lineNANYA TECHNOLOGY CORP·Filed 2022·Granted May 7, 2024·0 cites·13 claims
- 2159US7510930B2Method for fabricating recessed gate MOS transistor deviceNANYA TECHNOLOGY CORP·Filed 2007·Granted Mar 31, 2009·2 cites·10 claims
- 2251US7709318B2Method for fabricating a semiconductor deviceNANYA TECHNOLOGY CORP·Filed 2007·Granted May 4, 2010·0 cites·13 claims
- 2349US11145605B2Semiconductor device and method for fabricating the sameNANYA TECHNOLOGY CORP·Filed 2019·Granted Oct 12, 2021·0 cites·12 claims
- 2446US10741750B2Semiconductor structure and method for manufacturing the sameNANYA TECHNOLOGY CORP·Filed 2019·Granted Aug 11, 2020·0 cites·12 claims
- 2546US7622381B2Semiconductor structure and the forming method thereofNANYA TECHNOLOGY CORP·Filed 2007·Granted Nov 24, 2009·0 cites·9 claims
- 2644US8093639B2Method for fabricating a semiconductor deviceHO JAR-MING·Filed 2010·Granted Jan 10, 2012·0 cites·6 claims
- 2742US8298939B1Method for forming conductive contactHO JAR-MING·Filed 2011·Granted Oct 30, 2012·0 cites·9 claims
- 2842US7955927B2Semiconductor device and fabricating method thereofNANYA TECHNOLOGY CORP·Filed 2007·Granted Jun 7, 2011·0 cites·7 claims
- 2940US2007228435A1Semiconductor device and fabrication thereofNANYA TECHNOLOGY CORP·Filed 2006·Application pending·0 cites
- 3039US2007155179A1Method to define a pattern having shrunk critical dimensionHO JAR-MING·Filed 2006·Application pending·0 cites
- 3137US2008318388A1Method for fabricating mos transistor with recess channelLIN SHIAN-JYH·Filed 2007·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →