Inventor · disambiguated record
David K. Cassetti
Also filed as: CASSETTI DAVID · CASSETTI DAVID K
20 granted patents·2 pending applications·693 citations·filing 1994–2020
95Inventor score
Files withINTEL CORP7VLSI TECHNOLOGY INC7KONINKL PHILIPS ELECTRONICS NV2CASSETTI DAVID K1CORRENT CORP1
Top patents by PatentIndex Score
22 records- 0194US7194766B2Method and system for high-speed processing IPSec security protocol packetsCORRENT CORP·Filed 2001·Granted Mar 20, 2007·193 cites·32 claims
- 0294US6385749B1Method and arrangement for controlling multiple test access port control modulesKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted May 7, 2002·127 cites·28 claims
- 0393US10224957B1Hash-based data matching enhanced with backward matching for data compressionINTEL CORP·Filed 2017·Granted Mar 5, 2019·13 cites·26 claims
- 0491US6311302B1Method and arrangement for hierarchical control of multiple test access port control modulesPHILIPS SEMICONDUCTOR INC·Filed 1999·Granted Oct 30, 2001·98 cites·20 claims
- 0584US6334198B1Method and arrangement for controlling multiply-activated test access port control modulesKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Dec 25, 2001·56 cites·20 claims
- 0678US8705654B1Measuring phase shift in a radio frequency power amplifierKHLAT NADIM·Filed 2010·Granted Apr 22, 2014·5 cites·26 claims
- 0772US8370274B2Apparatuses and methods for deterministic pattern matchingINTEL CORP·Filed 2009·Granted Feb 5, 2013·5 cites·19 claims
- 0867US5794072ATiming method and apparatus for interleaving PIO and DMA data transfersVLSI TECHNOLOGY INC·Filed 1996·Granted Aug 11, 1998·54 cites·22 claims
- 0959US5793992AMethod and apparatus for arbitrating access to main memory of a computer systemVLSI TECHNOLOGY INC·Filed 1996·Granted Aug 11, 1998·39 cites·23 claims
- 1056US12021550B2Compression engine with configurable search depths and window sizesINTEL CORP·Filed 2020·Granted Jun 25, 2024·0 cites·21 claims
- 1151US9830189B2Multi-threaded queuing system for pattern matchingINTEL CORP·Filed 2015·Granted Nov 28, 2017·0 cites·29 claims
- 1250US10680643B2Compression scheme with control of search agent activityINTEL CORP·Filed 2019·Granted Jun 9, 2020·0 cites·23 claims
- 1350US5781802AFirst-in-first-out (FIFO) controller for buffering data between systems which are asynchronous and free of false flags and internal metastabilityVLSI TECHNOLOGY INC·Filed 1997·Granted Jul 14, 1998·24 cites·12 claims
- 1449US11431351B2Selection of data compression technique based on input characteristicsINTEL CORP·Filed 2019·Granted Aug 30, 2022·0 cites·20 claims
- 1546US5815675AMethod and apparatus for direct access to main memory by an I/O busVLSI TECHNOLOGY INC·Filed 1996·Granted Sep 29, 1998·22 cites·17 claims
- 1646US2011145205A1Packet Boundary Spanning Pattern Matching Based At Least In Part Upon History InformationJAIN SANJEEV·Filed 2009·Application pending·0 cites
- 1745US5535360ADigital computer system having an improved direct-mapped cache controller (with flag modification) for a CPU with address pipelining and method thereforVLSI TECHNOLOGY INC·Filed 1994·Granted Jul 9, 1996·16 cites·10 claims
- 1843US5842012AEfficient soft reset in a personal computerVLSI TECHNOLOGY INC·Filed 1996·Granted Nov 24, 1998·16 cites·10 claims
- 1942US9223618B2Multi-threaded queuing system for pattern matchingCASSETTI DAVID K·Filed 2011·Granted Dec 29, 2015·0 cites·14 claims
- 2042US2019123763A1Data compression engine for dictionary based lossless data compressionINTEL CORP·Filed 2018·Application pending·0 cites
- 2141US5752262ASystem and method for enabling and disabling writeback cacheVLSI TECHNOLOGY·Filed 1996·Granted May 12, 1998·14 cites·4 claims
- 2239US5696938AComputer system permitting mulitple write buffer read-arounds and method thereforVLSI TECHNOLOGY INC·Filed 1996·Granted Dec 9, 1997·11 cites·19 claims
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