Inventor · disambiguated record
Thomas A. Piazza
Also filed as: PIAZZA THOMAS · PIAZZA THOMAS A
67 granted patents·9 pending applications·1,060 citations·filing 1987–2016
99Inventor score
Top patents by PatentIndex Score
76 records- 0195US4958305APolygon edge clippingGEN ELECTRIC·Filed 1987·Granted Sep 18, 1990·152 cites·12 claims
- 0292US6466226B1Method and apparatus for pixel filtering using shared filter resource between overlay and texture mapping enginesINTEL CORP·Filed 2000·Granted Oct 15, 2002·64 cites·50 claims
- 0391US7050063B13-D rendering texture caching schemeINTEL CORP·Filed 2000·Granted May 23, 2006·44 cites·13 claims
- 0489US5367615ASpatial augmentation of vertices and continuous level of detail transition for smoothly varying terrain polygon densityGEN ELECTRIC·Filed 1993·Granted Nov 22, 1994·126 cites·20 claims
- 0587US9984430B2Ordering threads as groups in a multi-threaded, multi-core graphics compute systemINTEL CORP·Filed 2013·Granted May 29, 2018·9 cites·24 claims
- 0685US7414632B1Multi-pass 4:2:0 subpicture blendingINTEL CORP·Filed 2000·Granted Aug 19, 2008·31 cites·20 claims
- 0784US9928170B2Scatter/gather capable system coherent cacheINTEL CORP·Filed 2016·Granted Mar 27, 2018·3 cites·23 claims
- 0884US7719540B2Render-cache controller for multithreading, multi-core graphics processorINTEL CORP·Filed 2004·Granted May 18, 2010·35 cites·23 claims
- 0984US7158147B2Method and apparatus for pixel filtering using shared filter resource between overlay and texture mapping enginesINTEL CORP·Filed 2002·Granted Jan 2, 2007·22 cites·28 claims
- 1083US10152764B2Hardware based free lists for multi-rate shaderINTEL CORP·Filed 2015·Granted Dec 11, 2018·4 cites·15 claims
- 1183US7051172B2Memory arbiter with intelligent page gathering logicINTEL CORP·Filed 2004·Granted May 23, 2006·30 cites·5 claims
- 1283US6760031B1Upgrading an integrated graphics subsystemINTEL CORP·Filed 1999·Granted Jul 6, 2004·54 cites·42 claims
- 1382US7139890B2Methods and arrangements to interface memoryINTEL CORP·Filed 2002·Granted Nov 21, 2006·34 cites·14 claims
- 1481US6792516B2Memory arbiter with intelligent page gathering logicINTEL CORP·Filed 2001·Granted Sep 14, 2004·26 cites·16 claims
- 1581US6639598B2Method and apparatus for effective level of detail selectionINTEL CORP·Filed 2000·Granted Oct 28, 2003·27 cites·23 claims
- 1678US9824412B2Position-only shading pipelineINTEL CORP·Filed 2014·Granted Nov 21, 2017·5 cites·55 claims
- 1777US6393579B1Method and apparatus for saving power and improving performance in a collapsable pipeline using gated clocksINTEL CORP·Filed 1999·Granted May 21, 2002·76 cites·16 claims
- 1876US8643660B2Technique to share information among different cache coherency domainsOFFEN ZEEV·Filed 2012·Granted Feb 4, 2014·2 cites·8 claims
- 1976US7975272B2Thread queuing method and apparatusINTEL CORP·Filed 2006·Granted Jul 5, 2011·8 cites·22 claims
- 2075US9983884B2Method and apparatus for SIMD structured branchingINTEL CORP·Filed 2014·Granted May 29, 2018·3 cites·23 claims
- 2175US9087392B2Techniques for efficient GPU triangle list adjacency detection and handlingINTEL CORP·Filed 2012·Granted Jul 21, 2015·3 cites·24 claims
- 2275US7526124B2Match MSB digital image compressionINTEL CORP·Filed 2007·Granted Apr 28, 2009·3 cites·7 claims
- 2373US9741154B2Recording the results of visibility tests at the input geometry object granularityINTEL CORP·Filed 2012·Granted Aug 22, 2017·3 cites·18 claims
- 2473US7603544B2Dynamic allocation of a buffer across multiple clients in multi-threaded processor without performing a complete flush of data associated with allocationINTEL CORP·Filed 2005·Granted Oct 13, 2009·4 cites·16 claims
- 2571US6204857B1Method and apparatus for effective level of detail selectionREAL 3 D·Filed 1998·Granted Mar 20, 2001·49 cites·14 claims
- 2669US7212676B2Match MSB digital image compressionINTEL CORP·Filed 2002·Granted May 1, 2007·7 cites·30 claims
- 2767US7268779B2Z-buffering techniques for graphics renderingINTEL CORP·Filed 2002·Granted Sep 11, 2007·12 cites·28 claims
- 2867US7035984B2Memory arbiter with grace and ceiling periods and intelligent page gathering logicINTEL CORP·Filed 2001·Granted Apr 25, 2006·12 cites·10 claims
- 2967US6762765B2Bandwidth reduction for zone rendering via split vertex buffersINTEL CORP·Filed 2001·Granted Jul 13, 2004·11 cites·21 claims
- 3067US6191793B1Method and apparatus for texture level of detail ditheringREAL 3D INC·Filed 1998·Granted Feb 20, 2001·44 cites·19 claims
- 3165US8225012B2Dynamic allocation of a buffer across multiple clients in a threaded processorPIAZZA THOMAS A·Filed 2009·Granted Jul 17, 2012·2 cites·5 claims
- 3264US7904907B2Processing architecture having passive threads and active semaphoresINTEL CORP·Filed 2003·Granted Mar 8, 2011·8 cites·5 claims
- 3363US10204051B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2016·Granted Feb 12, 2019·0 cites·23 claims
- 3463US10078590B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2016·Granted Sep 18, 2018·0 cites·21 claims
- 3563US9946650B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2016·Granted Apr 17, 2018·0 cites·24 claims
- 3661US8271986B2Visual and graphical data processing using a multi-threaded architectureJIANG HONG·Filed 2003·Granted Sep 18, 2012·7 cites·19 claims
- 3761US7614054B2Behavioral model based multi-threaded architectureINTEL CORP·Filed 2003·Granted Nov 3, 2009·6 cites·30 claims
- 3861US6072505AMethod and apparatus to efficiently interpolate polygon attributes in two dimensions at a prescribed clock rateREAL 3D INC·Filed 1998·Granted Jun 6, 2000·34 cites·30 claims
- 3960US9665488B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2014·Granted May 30, 2017·0 cites·16 claims
- 4060US9235926B2Techniques for improving MSAA rendering efficiencySURTI PRASOONKUMAR·Filed 2012·Granted Jan 12, 2016·1 cites·28 claims
- 4159US9035962B2Technique to share information among different cache coherency domainsINTEL CORP·Filed 2013·Granted May 19, 2015·0 cites·7 claims
- 4259US6330646B1Arbitration mechanism for a computer system having a unified memory architectureINTEL CORP·Filed 1999·Granted Dec 11, 2001·36 cites·23 claims
- 4357US7532765B2Run length encoded digital imageINTEL CORP·Filed 2002·Granted May 12, 2009·6 cites·18 claims
- 4457US6950108B2Bandwidth reduction for rendering using vertex dataINTEL CORP·Filed 2004·Granted Sep 27, 2005·5 cites·14 claims
- 4557US6433790B1Methods and systems for rendering line and point features for displayINTEL CORP·Filed 1999·Granted Aug 13, 2002·26 cites·19 claims
- 4656US9035960B2Technique to share information among different cache coherency domainsOFFEN ZEEV·Filed 2012·Granted May 19, 2015·0 cites·20 claims
- 4756US8914800B2Behavioral model based multi-threaded architectureJIANG HONG·Filed 2009·Granted Dec 16, 2014·0 cites·20 claims
- 4855US9471492B2Scatter/gather capable system coherent cacheINTEL CORP·Filed 2013·Granted Oct 18, 2016·0 cites·25 claims
- 4955US7434028B2Hardware stack having entries with a data portion and associated counterINTEL CORP·Filed 2004·Granted Oct 7, 2008·4 cites·11 claims
- 5054US9035959B2Technique to share information among different cache coherency domainsOFFEN ZEEV·Filed 2008·Granted May 19, 2015·0 cites·25 claims
Showing the top 50 of 76 patent records by PatentIndex Score.
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