Inventor · disambiguated record
Chiew Li Tai
Also filed as: TAI CHIEW LI
7 granted patents·1 pending application·5 citations·filing 2017–2023
73Inventor score
Technology areasH10W
Top patents by PatentIndex Score
8 records- 0182US11075185B2Semiconductor package with multi-level conductive clip for top side coolingINFINEON TECHNOLOGIES AG·Filed 2019·Granted Jul 27, 2021·4 cites·16 claims
- 0267US2023411336A1Semiconductor wafer, clip and semiconductor deviceINFINEON TECHNOLOGIES AUSTRIA AG·Filed 2023·Application pending·0 cites
- 0360US11756917B2Method for processing a semiconductor wafer, semiconductor wafer, clip and semiconductor deviceINFINEON TECHNOLOGIES AUSTRIA AG·Filed 2021·Granted Sep 12, 2023·0 cites·16 claims
- 0459US10083899B2Semiconductor package with heat slug and rivet free die attach areaINFINEON TECHNOLOGIES AG·Filed 2017·Granted Sep 25, 2018·1 cites·14 claims
- 0556US10971436B2Multi-branch terminal for integrated circuit (IC) packageINFINEON TECHNOLOGIES AG·Filed 2019·Granted Apr 6, 2021·0 cites·20 claims
- 0654US10354943B1Multi-branch terminal for integrated circuit (IC) packageINFINEON TECHNOLOGIES AG·Filed 2018·Granted Jul 16, 2019·0 cites·20 claims
- 0740US10978380B2Semiconductor package with multi-level conductive clip for top side coolingINFINEON TECHNOLOGIES AG·Filed 2019·Granted Apr 13, 2021·0 cites·17 claims
- 0835US10431526B2Rivetless lead fastening for a semiconductor packageINFINEON TECHNOLOGIES AG·Filed 2017·Granted Oct 1, 2019·0 cites·21 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →