Inventor

SHANBHOGUE VEDVYAS

US196 patents

⚠️ This page may combine multiple inventors who share the name “SHANBHOGUE VEDVYAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHANBHOGUE VEDVYAS

INTEL CORP

Processors, methods, systems, and instructions to support live migration of protected containers

Processor extensions to protect stacks during ring transitions

Processors, methods, systems, and instructions to support live migration of protected containers

Encoded inline capabilities

Method and apparatus for fine grain memory protection

Crypto-enforced capabilities for isolation

Memory management in secure enclaves

Control transfer termination instructions of an instruction set architecture (ISA)

Processor extensions to protect stacks during ring transitions

Processor extensions to protect stacks during ring transitions

Apparatuses, methods, and systems for instructions to compartmentalize code

Processors, methods, systems, and instructions to support live migration of protected containers

Attack protection for valid gadget control transfers

Hardware apparatuses and methods to switch shadow stack pointers

Supporting secure memory intent

Loading and virtualizing cryptographic keys

Instructions and logic to interrupt and resume paging in a secure enclave page cache

Supporting secure memory intent

Secure memory repartitioning

Attack Protection for valid gadget control transfers

Instructions and logic to interrupt and resume paging in a secure enclave page cache

Control transfer termination instructions of an instruction set architecture (ISA)

Control of entry into protected memory views

Using software having control transfer termination instructions with software not having control transfer termination instructions

Method, apparatus and system for performing management component transport protocol (MCTP) communications with a universal serial bus (USB) device

Returning to a control transfer instruction

Paging in secure enclaves

Processor extensions for execution of secure embedded containers

Rolling software upgrades for fault tolerant systems

Apparatus and method for secure memory access using trust domains

Defining virtualized page attributes based on guest page attributes

Scalable processor-assisted guest physical address translation

Modifying memory permissions in a secure processing environment

Hardware apparatuses, methods, and systems for individually revocable capabilities for enforcing temporal memory safety

System, apparatus and method for in-field self testing in a diagnostic sleep state

Memory encryption engine interface in compute express link (CXL) attached memory controllers

System for address mapping and translation protection

Application programming interface for fine grained low latency decompression within processor core

Processor extensions to protect stacks during ring transitions

64-bit virtual addresses having metadata bit(s) and canonicality check that does not fail due to non-canonical values of metadata bit(s)

Processors, methods, systems, and instructions to support live migration of protected containers

ISA accessible physical unclonable function

Secure arbitration mode to build and operate within trust domain extensions

SHANBHOGUE VEDVYAS

Efficient handling of interrupts in a computing environment

Method and apparatus for network filtering and firewall protection on a secure partition

Processor extensions for execution of secure embedded containers

MCKEEN FRANCIS X

Logging in secure enclaves

SMITH NED

Providing integrity verification and attestation in a hidden execution environment

SAHITA RAVI L

Software copy protection via protected execution of applications

VEMBU BALAJI

Method and apparatus for providing a secure display window inside the primary display