Inventor · disambiguated record
Duncan A. Riach
Also filed as: RIACH DUNCAN · RIACH DUNCAN A · RIACH DUNCAN ANDREW
21 granted patents·1 pending application·172 citations·filing 2000–2019
94Inventor score
Top patents by PatentIndex Score
22 records- 0190US8234488B1System and method for controlling mode switches in hardwareRIACH DUNCAN A·Filed 2007·Granted Jul 31, 2012·11 cites·19 claims
- 0286US7941645B1Isochronous pipelined processor with deterministic controlNVIDIA CORP·Filed 2004·Granted May 10, 2011·48 cites·24 claims
- 0386US6788312B1Method for improving quality in graphics pipelines through a frame's top and bottom field processing with conditional thresholding and weighting techniquesNVIDIA CORP·Filed 2001·Granted Sep 7, 2004·34 cites·16 claims
- 0485US8049761B1Bus protocol for transferring pixel data between chipsNVIDIA CORP·Filed 2007·Granted Nov 1, 2011·16 cites·20 claims
- 0584US7586492B2Real-time display post-processing using programmable hardwareNVIDIA CORP·Filed 2004·Granted Sep 8, 2009·25 cites·26 claims
- 0676US7426594B1Apparatus, system, and method for arbitrating between memory requestsNVIDIA CORP·Filed 2004·Granted Sep 16, 2008·16 cites·4 claims
- 0773US8154556B1Multiple simultaneous unique outputs from a single display pipelineRIACH DUNCAN A·Filed 2007·Granted Apr 10, 2012·2 cites·14 claims
- 0871US8134567B1Active raster composition and error checking in hardwareRIACH DUNCAN A·Filed 2007·Granted Mar 13, 2012·2 cites·25 claims
- 0969US8155316B1Contract based memory management for isochronous streamsRIACH DUNCAN A·Filed 2007·Granted Apr 10, 2012·4 cites·20 claims
- 1069US6897874B1Method and apparatus for providing overlay imagesNVIDIA CORP·Filed 2000·Granted May 24, 2005·11 cites·29 claims
- 1164US7999815B1Active raster composition and error checking in hardwareNVDIA CORP·Filed 2007·Granted Aug 16, 2011·1 cites·22 claims
- 1257US9292069B1System and method for controlling mode switches in hardwareRIACH DUNCAN A·Filed 2007·Granted Mar 22, 2016·0 cites·17 claims
- 1356US9489712B2Multiple simultaneous unique outputs from a single display pipelineRIACH DUNCAN A·Filed 2012·Granted Nov 8, 2016·0 cites·19 claims
- 1455US8963940B1Isochronous hub contractsRIACH DUNCAN A·Filed 2007·Granted Feb 24, 2015·0 cites·20 claims
- 1555US8125491B1Multiple simultaneous unique outputs from a single display pipelineRIACH DUNCAN A·Filed 2007·Granted Feb 28, 2012·1 cites·20 claims
- 1653US6937290B1Method and apparatus using the Bresenham algorithm to synthesize a composite SYNC signalNVIDIA CORP·Filed 2001·Granted Aug 30, 2005·1 cites·53 claims
- 1752US7573528B1Method and apparatus for displaying progressive material on an interlaced deviceNVIDIA CORP·Filed 2005·Granted Aug 11, 2009·0 cites·20 claims
- 1850US8447035B2Contract based memory management for isochronous streamsRIACH DUNCAN A·Filed 2012·Granted May 21, 2013·0 cites·20 claims
- 1949US12493784B1Tie-breaker for inference reproducibilityNVIDIA CORP·Filed 2019·Granted Dec 9, 2025·0 cites·31 claims
- 2046US7015970B1Method and apparatus for displaying progressive material on an interlaced deviceNVIDIA CORP·Filed 2001·Granted Mar 21, 2006·0 cites·26 claims
- 2145US7882380B2Work based clock management for display sub-systemNVIDIA CORP·Filed 2007·Granted Feb 1, 2011·0 cites·16 claims
- 2245US2009085928A1Antialiasing using multiple display heads of a graphics processorNVIDIA CORP·Filed 2007·Application pending·0 cites
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