Inventor
MOHAN SUNDARARAJARAO
US54 patents
⚠️ This page may combine multiple inventors who share the name “MOHAN SUNDARARAJARAO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
47 patentsUS6421817B1Jul 16, 2002
System and method of computation in a programmable logic device using virtual instructions
XILINX INC150 citations99
US6396302B2May 28, 2002
Configurable logic element with expander structures
XILINX INC92 citations99
US6255849B1Jul 3, 2001
On-chip self-modification for PLDs
XILINX INC300 citations99
US6150838ANov 21, 2000
FPGA configurable logic block with multi-purpose logic/memory circuit
XILINX INC315 citations99
US6047115AApr 4, 2000
Method for configuring FPGA memory planes for virtual hardware computation
XILINX INC175 citations99
US6388466B1May 14, 2002
FPGA logic element with variable-length shift register capability
XILINX INC92 citations98
US6208163B1Mar 27, 2001
FPGA configurable logic block with multi-purpose logic/memory circuit
XILINX INC87 citations98
US6118300ASep 12, 2000
Method for implementing large multiplexers with FPGA lookup tables
XILINX INC102 citations98
US6091263AJul 18, 2000
Rapidly reconfigurable FPGA having a multiple region architecture with reconfiguration caches useable as data RAM
XILINX INC412 citations98
US6457164B1Sep 24, 2002
Hetergeneous method for determining module placement in FPGAs
XILINX INC103 citations97
US6292925B1Sep 18, 2001
Context-sensitive self implementing modules
XILINX INC90 citations97
US6216258B1Apr 10, 2001
FPGA modules parameterized by expressions
XILINX INC84 citations97
US6150839ANov 21, 2000
Rapidly reconfigurable FPGA having a multiple region architecture with reconfiguration caches useable as data RAM
XILINX INC183 citations97
US6501296B2Dec 31, 2002
Logic/memory circuit having a plurality of operating modes
XILINX INC47 citations96
US6400180B2Jun 4, 2002
Configurable lookup table for programmable logic devices
XILINX INC71 citations96
US6336208B1Jan 1, 2002
Delay optimized mapping for programmable gate arrays with multiple sized lookup tables
XILINX INC60 citations96
US6260182B1Jul 10, 2001
Method for specifying routing in a logic module by direct module communication
XILINX INC70 citations96
US6243851B1Jun 5, 2001
Heterogeneous method for determining module placement in FPGAs
XILINX INC71 citations96
US6191610B1Feb 20, 2001
Method for implementing large multiplexers with FPGA lookup tables
XILINX INC46 citations96
US6184712B1Feb 6, 2001
FPGA configurable logic block with multi-purpose logic/memory circuit
XILINX INC60 citations96
US8775986B1Jul 8, 2014
Software debugging of synthesized hardware
XILINX INC22 citations93
US6847229B2Jan 25, 2005
Configurable logic element with expander structures
XILINX INC20 citations93
US6630841B2Oct 7, 2003
Configurable logic element with expander structures
XILINX INC14 citations93
US6505337B1Jan 7, 2003
Method for implementing large multiplexers with FPGA lookup tables
XILINX INC29 citations93
US9652570B1May 16, 2017
Automatic implementation of a customized system-on-chip
XILINX INC21 citations92
US8762916B1Jun 24, 2014
Automatic generation of a data transfer network
XILINX INC20 citations92
US7721090B1May 18, 2010
Event-driven simulation of IP using third party event-driven simulators
XILINX INC28 citations92
US7676661B1Mar 9, 2010
Method and system for function acceleration using custom instructions
XILINX INC24 citations92
US6583645B1Jun 24, 2003
Field programmable optical arrays
XILINX INC38 citations92
US6353920B1Mar 5, 2002
Method for implementing wide gates and tristate buffers using FPGA carry logic
XILINX INC26 citations92
US6237129B1May 22, 2001
Method for constraining circuit element positions in structured layouts
XILINX INC34 citations92
US7111273B1Sep 19, 2006
Softpal implementation and mapping technology for FPGAs with dedicated resources
XILINX INC16 citations84
US6603332B2Aug 5, 2003
Configurable logic block for PLD with logic gate for combining output with another configurable logic block
XILINX INC17 citations84
US9880966B1Jan 30, 2018
Encapsulating metadata of a platform for application-specific tailoring and reuse of the platform in an integrated circuit
XILINX INC14 citations83
US9223921B1Dec 29, 2015
Compilation of HLL code with hardware accelerated functions
XILINX INC18 citations83
US7310594B1Dec 18, 2007
Method and system for designing a multiprocessor
XILINX INC13 citations83
US9147024B1Sep 29, 2015
Hardware and software cosynthesis performance estimation
XILINX INC14 citations82
US6288569B1Sep 11, 2001
Memory array with hard and soft decoders
XILINX INC12 citations82
US7248073B2Jul 24, 2007
Configurable logic element with expander structures
XILINX INC7 citations74
US10740146B2Aug 11, 2020
Migrating virtual machines between compute systems by transmitting programmable logic accelerator state
XILINX INC5 citations73
US10474599B1Nov 12, 2019
Striped direct memory access circuit
XILINX INC5 citations73
US9805152B1Oct 31, 2017
Compilation of system designs
XILINX INC6 citations72
US11657040B2May 23, 2023
Blockchain machine network acceleration engine
XILINX INC2 citations70
US7243330B1Jul 10, 2007
Method and apparatus for providing self-implementing hardware-software libraries
XILINX INC8 citations70
US11024583B2Jun 1, 2021
Integration of a programmable device and a processing system in an integrated circuit package
XILINX INC0 citations63
US7145360B2Dec 5, 2006
Configurable logic element with expander structures
XILINX INC3 citations63
US12574436B2Mar 10, 2026
Blockchain machine broadcast protocol with loss recovery
XILINX INC0 citations60
MOHAN SUNDARARAJARAO
1 patentSABIH SABIH
1 patentPHILIPS CORP
1 patentShowing the top 50 of 54 patents by PatentIndex Score.