Inventor · disambiguated record
Ravi Mehta
Also filed as: MEHTA RAVI · MEHTA RAVI JITENDRA
18 granted patents·2 pending applications·50 citations·filing 2008–2023
91Inventor score
Top patents by PatentIndex Score
20 records- 0190US10205445B1Clock duty cycle correction circuitSYNOPSYS INC·Filed 2018·Granted Feb 12, 2019·10 cites·19 claims
- 0290US9813069B1Half-rate bang-bang phase detectorSILAB TECH PVT LTD·Filed 2016·Granted Nov 7, 2017·12 cites·21 claims
- 0382US9509319B1Clock and data recovery circuitSILAB TECH PVT LTD·Filed 2016·Granted Nov 29, 2016·9 cites·22 claims
- 0481US9577848B1Decision feedback equalizerSILAB TECH PVT LTD·Filed 2015·Granted Feb 21, 2017·8 cites·26 claims
- 0573US11652475B1Independent skew control of a multi-phase clockSYNOPSYS INC·Filed 2022·Granted May 16, 2023·1 cites·20 claims
- 0670US10659214B2Multi-level clock and data recovery circuitSYNOPSYS INC·Filed 2017·Granted May 19, 2020·2 cites·20 claims
- 0768US10236843B2High gain differential amplifier with common-mode feedbackSYNOPSYS INC·Filed 2018·Granted Mar 19, 2019·2 cites·13 claims
- 0866US10236891B1Lock time measurement of clock and data recovery circuitSYNOPSYS INC·Filed 2018·Granted Mar 19, 2019·2 cites·15 claims
- 0959US10516523B2System for serializing high speed data signalsSYNOPSYS INC·Filed 2018·Granted Dec 24, 2019·0 cites·20 claims
- 1057US12483378B2Transceiver devices with transmitter and receiver frequency controlSYNOPSYS INC·Filed 2022·Granted Nov 25, 2025·0 cites·20 claims
- 1156US9548855B2Method and apparatus for managing estimation and calibration of non-ideality of a phase interpolator (PI)-based clock and data recovery (CDR) circuitCHATTOPADHYAY BIMAN·Filed 2015·Granted Jan 17, 2017·2 cites·6 claims
- 1255US11223469B2System for serializing high speed data signalsSYNOPSYS INC·Filed 2019·Granted Jan 11, 2022·0 cites·19 claims
- 1352US10142097B2System for serializing high speed data signalsSYNOPSYS INC·Filed 2016·Granted Nov 27, 2018·0 cites·18 claims
- 1452US7683716B2Constant output common mode voltage of a pre-amplifier circuitTEXAS INSTRUMENTS INC·Filed 2008·Granted Mar 23, 2010·2 cites·20 claims
- 1551US10491367B2Clock and data recovery (CDR) circuitSYNOPSYS INC·Filed 2019·Granted Nov 26, 2019·0 cites·18 claims
- 1649US2023316102A1Integration and use of sparse hierarchical training dataSAP SE·Filed 2022·Application pending·0 cites
- 1745US11101830B2Calibration scheme for serialization in transmitterSYNOPSYS INC·Filed 2019·Granted Aug 24, 2021·0 cites·20 claims
- 1845US2024427217A1Method for preparing a gottesman-kitaev-preskill state using an artificial-atom in a cavity and apparatus thereofGOYAL SANDEEP KUMAR·Filed 2023·Application pending·0 cites
- 1944US10164798B2Driver circuit for transmitterSYNOPSYS INC·Filed 2017·Granted Dec 25, 2018·0 cites·24 claims
- 2039US10608645B2Fast locking clock and data recovery circuitSYNOPSYS INC·Filed 2018·Granted Mar 31, 2020·0 cites·20 claims
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