Inventor · disambiguated record
Jiantao Bian
Also filed as: BIAN JIANTAO
3 granted patents·3 pending applications·10 citations·filing 2012–2012
60Inventor score
Top patents by PatentIndex Score
6 records- 0174US8828812B2Silicon-germanium heterojunction tunnel field effect transistor and preparation method thereofSHANGHAI INST MICROSYS & INF·Filed 2012·Granted Sep 9, 2014·4 cites·18 claims
- 0271US8501577B2Preparation method for full-isolated SOI with hybrid crystal orientationsBIAN JIANTAO·Filed 2012·Granted Aug 6, 2013·6 cites·10 claims
- 0336US9230849B2Method for preparing ultra-thin material on insulator through adsorption by doped ultra-thin layerDI ZENGFENG·Filed 2012·Granted Jan 5, 2016·0 cites·16 claims
- 0434US2013264609A1Semiconductor Structure of Hybrid of Coplanar Ge and III-V and Preparation Method ThereofDI ZENGFENG·Filed 2012·Application pending·0 cites
- 0532US2013062696A1SOI Semiconductor Structure with a Hybrid of Coplanar Germanium and III-V, and Preparation Method thereofDI ZENGFENG·Filed 2012·Application pending·0 cites
- 0630US2013221412A1Device System Structure Based On Hybrid Orientation SOI and Channel Stress and Preparation Method ThereofBIAN JIANTAO·Filed 2012·Application pending·0 cites
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