Inventor · disambiguated record
Blaine Stackhouse
Also filed as: STACKHOUSE BLAINE
7 granted patents·1 pending application·126 citations·filing 1996–2013
85Inventor score
Top patents by PatentIndex Score
8 records- 0191US7992017B2Methods and apparatuses for reducing step loads of processorsINTEL CORP·Filed 2007·Granted Aug 2, 2011·34 cites·25 claims
- 0284US8479029B2Methods and apparatuses for reducing step loads of processorsSAFFORD KEVIN·Filed 2011·Granted Jul 2, 2013·12 cites·15 claims
- 0384US6728823B1Cache connection with bypassing featureHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Apr 27, 2004·45 cites·24 claims
- 0464US8886979B2Methods and apparatuses for reducing step loads of processorsINTEL CORP·Filed 2013·Granted Nov 11, 2014·1 cites·18 claims
- 0563US5740000AESD protection system for an integrated circuit with multiple power supply networksHEWLETT PACKARD CO·Filed 1996·Granted Apr 14, 1998·28 cites·6 claims
- 0650US7133319B2Programmable weak write test mode (PWWTM) bias generation having logic high output default modeHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Nov 7, 2006·6 cites·24 claims
- 0731US2004257882A1Bias generation having adjustable range and resolution through metal programmingFiled 2003·Application pending·0 cites
- 0830US6185148B1General purpose decode implementation for multiported memory array circuitsHEWLETT PACKARD CO·Filed 2000·Granted Feb 6, 2001·0 cites·19 claims
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