Inventor · disambiguated record
Jai-Dong Lee
Also filed as: LEE JAI-DONG
10 granted patents·4 pending applications·69 citations·filing 2002–2009
88Inventor score
Top patents by PatentIndex Score
14 records- 0182US7361560B2Method of manufacturing a dielectric layer in a memory device that includes nitriding stepSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Apr 22, 2008·8 cites·10 claims
- 0281US6797561B2Method of fabricating a capacitor of a semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Sep 28, 2004·26 cites·18 claims
- 0374US7007933B2Method and apparatus for supplying a source gasSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Mar 7, 2006·13 cites·20 claims
- 0471US7736963B2Method of forming a gate structure for a semiconductor device and method of forming a cell gate structure for a non-volatile memory deviceSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Jun 15, 2010·5 cites·17 claims
- 0568US7902059B2Methods of forming void-free layers in openings of semiconductor substratesSAMSUNG ELECTRONICS CO LTD·Filed 2009·Granted Mar 8, 2011·3 cites·23 claims
- 0666US7223657B2Methods of fabricating flash memory devices with floating gates that have reduced seamsSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted May 29, 2007·3 cites·21 claims
- 0765US7592227B2Methods of manufacturing a semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Sep 22, 2009·2 cites·22 claims
- 0855US7153362B2System and method for real time deposition process control based on resulting product detectionSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Dec 26, 2006·5 cites·14 claims
- 0952US7459364B2Methods of forming self-aligned floating gates using multi-etchingSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Dec 2, 2008·4 cites·14 claims
- 1046US7629217B2Methods of forming void-free layers in openings of semiconductor substratesSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Dec 8, 2009·0 cites·25 claims
- 1141US2006134925A1Method of forming a gate insulating layer of a semiconductor device using deuterium gasLEE JAI-DONG·Filed 2005·Application pending·0 cites
- 1239US2005266640A1Method of forming a dielectric layer and method of manufacturing a nonvolatile memory device using the sameYOU YOUNG-SUB·Filed 2005·Application pending·0 cites
- 1339US2005101143A1Methods of fabricating a semiconductor device and forming a trench region in a semiconductor deviceFiled 2004·Application pending·0 cites
- 1438US2005153513A1Method of forming a dielectric layer for a non-volatile memory cell and method of forming a non-volatile memory cell having the dielectric layerFiled 2004·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →