Inventor

NING TAK H

US235 patents

⚠️ This page may combine multiple inventors who share the name “NING TAK H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NING TAK H

IBM

Vertical transistor with air-gap spacer

Complementary SOI lateral bipolar transistors with backplate bias

Active matrix using hybrid integrated circuit and bipolar transistor

Structure and method of fabricating high-density trench-based non-volatile random access SONOS memory cells for SOC applications

Intralevel decoupling capacitor, method of manufacture and testing circuit of the same

Intralevel decoupling capacitor, method of manufacture and testing circuit of the same

Structure and fabrication method for EEPROM memory cell with selective channel implants

Dynamic ram cell with MOS trench capacitor in CMOS

Method for fabricating transistor structures having very short effective channels

FET and/or bipolar devices formed in thin vertical silicon on insulator (SOI) structures

Double self-aligned fabrication process for making a bipolar transistor structure having a small polysilicon-to-extrinsic base contact area

Lateral bipolar junction transistor with controlled junction

Stacked vertical transport field effect transistor electrically erasable programmable read only memory (EEPROM) devices

Stacked nanosheet field effect transistor floating-gate EEPROM cell and array

Programmable read only memory (ROM) integrated in tight pitch vertical transistor structures

Floating gate memory in a channel last vertical FET flow

Vertical floating gate memory with variable channel doping profile

Vertical transistor with air-gap spacer

Lateral bipolar junction transistor with abrupt junction and compound buried oxide

Vertical transistors having different gate lengths

Monolithic integrated photonics with lateral bipolar and BiCMOS

Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having a wide band gap emitter/collector which are epitaxially grown

Lateral heterojunction bipolar transistors

Method of manufacturing an intralevel decoupling capacitor

Semiconductor-on-insulator (SOI) lateral heterojunction bipolar transistor having a wide band gap emitter/collector which are epitaxially grown

CMOS EPROM and EEPROM devices and programmable CMOS inverters

Electronic switch for decoupling capacitor

Interconnection of opposite conductivity type semiconductor regions

Methods for making high performance lateral bipolar transistors

Integrated circuit having a sublayer electrical contact and fabrication thereof

Method of making FET containing stacked gates

Self-aligned bipolar transistor with inverted polycide base contact

Bipolar junction transistor (BJT) for liquid flow biosensing applications without a reference electrode and large sensing area

Lateral bipolar junction transistor with abrupt junction and compound buried oxide

Stacked FinFET EEPROM

Vertical transistor with air-gap spacer

High voltage laterally diffused MOSFET with buried field shield and method to fabricate same

Bipolar transistor compatible with vertical FET fabrication

Passivated germanium-on-insulator lateral bipolar transistors

Germanium lateral bipolar transistor with silicon passivation

CAI JIN

Charge sensors using inverted lateral bipolar junction transistors

Electrically programmable floating common gate CMOS device and applications thereof

Horizontal polysilicon-germanium heterojunction bipolar transistor

Germanium lateral bipolar junction transistor

Germanium lateral bipolar junction transistor

SOI lateral bipolar junction transistor having a wide band gap emitter contact

NING TAK H

SOI SiGe-base lateral bipolar junction transistor

SOI SiGe-base lateral bipolar junction transistor

Junction field effect transistor with an epitaxially grown gate structure

HO HERBERT L

High-density, trench-based non-volatile random access SONOS memory SOC applications