Inventor · disambiguated record

Anant Vaidyanathan

Also filed as: VAIDYANATHAN ANANT

1 granted patent·19 citations·filing 1998–1998

39Inventor score

Technology areasH10W

Files withINTEL CORP1

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1 record

0149US6278185B1Semi-additive process (SAP) architecture for organic leadless grid array packagesINTEL CORP·Filed 1998·Granted Aug 21, 2001·19 cites·9 claims

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Anant Vaidyanathan — Patent Inventor | PatentIndex