Inventor · disambiguated record
Mariette Awad
Also filed as: AWAD MARIETTE · AWAD MARIETTE A
11 granted patents·2 pending applications·15 citations·filing 2004–2017
84Inventor score
Top patents by PatentIndex Score
13 records- 0168US7666712B2Design of BEOL patterns to reduce the stresses on structures below chip bondpadsIBM·Filed 2008·Granted Feb 23, 2010·3 cites·8 claims
- 0259US9811555B2Recognition of free-form gestures from orientation tracking of a handheld or wearable deviceINTEL CORP·Filed 2014·Granted Nov 7, 2017·1 cites·25 claims
- 0359US7489038B2Design of BEOL patterns to reduce the stresses on structures below chip bondpadsIBM·Filed 2005·Granted Feb 10, 2009·1 cites·11 claims
- 0456US7595681B2Method and apparatus for compensating for variances of a buried resistor in an integrated circuitIBM·Filed 2006·Granted Sep 29, 2009·4 cites·5 claims
- 0553US8341428B2System and method to protect computing systemsAWAD ELIE·Filed 2007·Granted Dec 25, 2012·2 cites·25 claims
- 0650US10210202B2Recognition of free-form gestures from orientation tracking of a handheld or wearable deviceINTEL CORP·Filed 2017·Granted Feb 19, 2019·0 cites·17 claims
- 0750US7071559B2Design of beol patterns to reduce the stresses on structures below chip bondpadsIBM·Filed 2004·Granted Jul 4, 2006·3 cites·2 claims
- 0849US9043889B2Method and apparatus for secure and reliable computingIBM·Filed 2013·Granted May 26, 2015·0 cites·18 claims
- 0945US8424071B2Method and apparatus for secure and reliable computingAWAD MARIETTE·Filed 2009·Granted Apr 16, 2013·0 cites·20 claims
- 1045US7962322B2Design structure for compensating for variances of a buried resistor in an integrated circuitIBM·Filed 2008·Granted Jun 14, 2011·1 cites·8 claims
- 1143US2008320423A1System and method to protect computing systemsIBM·Filed 2007·Application pending·0 cites
- 1237US2009119772A1Secure file accessAWAD MARIETTE·Filed 2007·Application pending·0 cites
- 1336US7886237B2Method of generating a functional design structureIBM·Filed 2008·Granted Feb 8, 2011·0 cites·1 claims
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