Inventor · disambiguated record
Satish Soman
Also filed as: SOMAN SATISH · SOMAN SATISH S
16 granted patents·880 citations·filing 1991–2001
95Inventor score
Files withLSI LOGIC CORP11AXIOWAVE NETWORKS INC2DIGITAL EQUIPMENT CORP1NEXABIT NETWORKS INC1NEXABIT NETWORKS LLC1
Top patents by PatentIndex Score
16 records- 0188US6404817B1MPEG video decoder having robust error detection and concealmentLSI LOGIC CORP·Filed 1997·Granted Jun 11, 2002·126 cites·26 claims
- 0286US6430533B1Audio decoder core MPEG-1/MPEG-2/AC-3 functional algorithm partitioning and implementationLSI LOGIC CORP·Filed 1998·Granted Aug 6, 2002·138 cites·21 claims
- 0382US6128597AAudio decoder with a reconfigurable downmixing/windowing pipeline and method thereforLSI LOGIC CORP·Filed 1998·Granted Oct 3, 2000·147 cites·8 claims
- 0480US6237130B1Chip layout for implementing arbitrated high speed switching access of pluralities of I/O data ports to internally cached DRAM banks and the likeNEXABIT NETWORKS INC·Filed 1998·Granted May 22, 2001·51 cites·14 claims
- 0579US6310918B1System and method for motion vector extraction and computation meeting 2-frame store and letterboxing requirementsLSI LOGIC CORP·Filed 1997·Granted Oct 30, 2001·62 cites·22 claims
- 0679US6122619AAudio decoder with programmable downmixing of MPEG/AC-3 and method thereforLSI LOGIC CORP·Filed 1998·Granted Sep 19, 2000·101 cites·20 claims
- 0773US6101221AVideo bitstream symbol extractor for use in decoding MPEG compliant video bitstreams meeting 2-frame and letterboxing requirementsLSI LOGIC CORP·Filed 1997·Granted Aug 8, 2000·45 cites·23 claims
- 0872US5193149ADual-path computer interconnect system with four-ported packet memory controlDIGITAL EQUIPMENT CORP·Filed 1991·Granted Mar 9, 1993·81 cites·51 claims
- 0971US6266091B1System and method for low delay mode operation video decodingLSI LOGIC CORP·Filed 1997·Granted Jul 24, 2001·40 cites·20 claims
- 1057US6138219AMethod of and operating architectural enhancement for multi-port internally cached dynamic random access memory (AMPIC DRAM) systems, eliminating external control paths and random memory addressing, while providing zero bus contention for DRAM accessNEXABIT NETWORKS LLC·Filed 1998·Granted Oct 24, 2000·42 cites·25 claims
- 1154US6122316AMPEG decoding system meeting 2-frame store and letterboxing requirementsLSI LOGIC CORP·Filed 1997·Granted Sep 19, 2000·18 cites·15 claims
- 1253US6684317B2Method of addressing sequential data packets from a plurality of input data line cards for shared memory storage and the like, and novel address generator thereforAXIOWAVE NETWORKS INC·Filed 2001·Granted Jan 27, 2004·5 cites·25 claims
- 1349US6999464B2Method of scalable non-blocking shared memory output-buffered switching of variable length data packets from pluralities of ports at full line rate, and apparatus thereforAXIOWAVE NETWORKS INC·Filed 2001·Granted Feb 14, 2006·1 cites·24 claims
- 1444US6289053B1Architecture for decoding MPEG compliant video bitstreams meeting 2-frame and letterboxing requirementsLSI LOGIC CORP·Filed 1997·Granted Sep 11, 2001·10 cites·19 claims
- 1544US6236681B1Method for decoding MPEG compliant video bitstreams meeting 2-frame and letterboxing requirementsLSI LOGIC CORP·Filed 1997·Granted May 22, 2001·10 cites·22 claims
- 1631US6757658B1Audio decoder core (acore) MPEG sub-band synthesis algorithmic optimizationLSI LOGIC CORP·Filed 1998·Granted Jun 29, 2004·3 cites·21 claims
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