Inventor · disambiguated record
Kim Schuttenberg
Also filed as: SCHUTTENBERG KIM · SCHUTTENBERG Kim Richard
26 granted patents·1 pending application·103 citations·filing 2009–2023
94Inventor score
Technology areasG06F
Top patents by PatentIndex Score
27 records- 0196US11132200B1Loop end prediction using loop counter updated by inflight loop end instructionsADVANCED RISC MACH LTD·Filed 2020·Granted Sep 28, 2021·9 cites·19 claims
- 0295US9934152B1Method and apparatus to use hardware alias detection and management in a virtually indexed physically tagged cacheMARVELL INT LTD·Filed 2016·Granted Apr 3, 2018·24 cites·20 claims
- 0388US9141543B1Systems and methods for writing data from a caching agent to main memory according to a pre-clean criterionMARVELL INT LTD·Filed 2012·Granted Sep 22, 2015·12 cites·20 claims
- 0486US9164900B1Methods and systems for expanding preload capabilities of a memory to encompass a register fileMARVELL INT LTD·Filed 2013·Granted Oct 20, 2015·9 cites·18 claims
- 0585US9360915B1Dynamically controlling clocking rate of a processor based on user defined ruleMARVELL INT LTD·Filed 2013·Granted Jun 7, 2016·9 cites·17 claims
- 0684US9842051B1Managing aliasing in a virtually indexed physically tagged cacheMARVELL INT LTD·Filed 2016·Granted Dec 12, 2017·4 cites·20 claims
- 0781US9304777B1Method and apparatus for determining relative ages of entries in a queueMARVELL INT LTD·Filed 2013·Granted Apr 5, 2016·8 cites·20 claims
- 0880US10877901B2Method and apparatus for utilizing proxy identifiers for merging of store operationsADVANCED RISC MACH LTD·Filed 2017·Granted Dec 29, 2020·4 cites·10 claims
- 0977US8296525B1Method and apparatus for data-less bus queryO'BLENESS FRANK·Filed 2009·Granted Oct 23, 2012·9 cites·20 claims
- 1075US9405542B1Method and apparatus for updating a speculative rename table in a microprocessorMARVELL INT LTD·Filed 2013·Granted Aug 2, 2016·5 cites·14 claims
- 1175US9311247B1Method and apparatus for detecting patterns of memory accesses in a computing system with out-of-order program executionMARVELL INT LTD·Filed 2013·Granted Apr 12, 2016·4 cites·13 claims
- 1273US11086777B2Replacement of cache entries in a set-associative cacheADVANCED RISC MACH LTD·Filed 2019·Granted Aug 10, 2021·1 cites·18 claims
- 1372US8688919B1Method and apparatus for associating requests and responses with identification informationMARVELL INT LTD·Filed 2012·Granted Apr 1, 2014·2 cites·20 claims
- 1465US9116742B1Systems and methods for reducing interrupt latencySCHUTTENBERG KIM·Filed 2012·Granted Aug 25, 2015·2 cites·20 claims
- 1563US9645936B1System and method for informing hardware to limit writing in a memory hierarchyMARVELL INT LTD·Filed 2015·Granted May 9, 2017·1 cites·20 claims
- 1660US12293189B2Data value prediction and pre-alignment based on prefetched predicted memory access addressADVANCED RISC MACH LTD·Filed 2023·Granted May 6, 2025·0 cites·16 claims
- 1756US9086976B1Method and apparatus for associating requests and responses with identification informationMARVELL INT LTD·Filed 2014·Granted Jul 21, 2015·0 cites·20 claims
- 1854US9436210B1Control—mechanism for selectively shorting clock grid by electrically connecting and disconnecting clock branches once per clock cycleMARVELL INT LTD·Filed 2013·Granted Sep 6, 2016·0 cites·17 claims
- 1950US10901691B2System, method and apparatus for inter-process communicationADVANCED RISC MACH LTD·Filed 2019·Granted Jan 26, 2021·0 cites·18 claims
- 2050US9304693B1System and method for writing data to a data storage structureMARVELL INT LTD·Filed 2013·Granted Apr 5, 2016·0 cites·17 claims
- 2149US9367456B1Integrated circuit and method for accessing segments of a cache line in arrays of storage elements of a folded cacheMARVELL INT LTD·Filed 2014·Granted Jun 14, 2016·0 cites·20 claims
- 2248US12353885B2Speculative execution following a state transition instructionADVANCED RISC MACH LTD·Filed 2020·Granted Jul 8, 2025·0 cites·10 claims
- 2348US11301252B2Executing mutually exclusive vector instructions according to a vector predicate instructionADVANCED RISC MACH LTD·Filed 2020·Granted Apr 12, 2022·0 cites·15 claims
- 2446US10474469B2Apparatus and method for determining a recovery point from which to resume instruction execution following handling of an unexpected change in instruction flowADVANCED RISC MACH LTD·Filed 2017·Granted Nov 12, 2019·0 cites·24 claims
- 2545US8607090B2Selective shorting for clock grid during a controlling portion of a clock signalSCHUTTENBERG KIM·Filed 2011·Granted Dec 10, 2013·0 cites·34 claims
- 2645US2025117252A1Instruction dispatchADVANCED RISC MACH LTD·Filed 2023·Application pending·0 cites
- 2735US10545879B2Apparatus and method for handling access requestsADVANCED RISC MACH LTD·Filed 2018·Granted Jan 28, 2020·0 cites·23 claims
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