Inventor · disambiguated record
Jonathan H. Shiell
Also filed as: SHIELL JONATHAN H
47 granted patents·2,970 citations·filing 1996–2000
99Inventor score
Files withTEXAS INSTRUMENTS INC47
Top patents by PatentIndex Score
47 records- 0195US6209114B1Efficient hardware implementation of chien search polynomial reduction in reed-solomon decodingTEXAS INSTRUMENTS INC·Filed 1998·Granted Mar 27, 2001·127 cites·15 claims
- 0292US5950012ASingle chip microprocessor circuits, systems, and methods for self-loading patch micro-operation codes and patch microinstruction codesTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 7, 1999·206 cites·67 claims
- 0389US6216219B1Microprocessor circuits, systems, and methods implementing a load target buffer with entries relating to prefetch desirabilityTEXAS INSTRUMENTS INC·Filed 1997·Granted Apr 10, 2001·172 cites·34 claims
- 0489US5913049AMulti-stream complex instruction set microprocessorTEXAS INSTRUMENTS INC·Filed 1997·Granted Jun 15, 1999·154 cites·19 claims
- 0588US6134634AMethod and apparatus for preemptive cache write-backTEXAS INSTRUMENTS INC·Filed 1997·Granted Oct 17, 2000·164 cites·28 claims
- 0688US6049672AMicroprocessor with circuits, systems, and methods for operating with patch micro-operation codes and patch microinstruction codes stored in multi-purpose memory structureTEXAS INSTRUMENTS INC·Filed 1997·Granted Apr 11, 2000·140 cites·20 claims
- 0787US5850543AMicroprocessor with speculative instruction pipelining storing a speculative register value within branch target buffer for use in speculatively executing instructions after a returnTEXAS INSTRUMENTS INC·Filed 1996·Granted Dec 15, 1998·139 cites·25 claims
- 0885US5864697AMicroprocessor using combined actual and speculative branch history predictionTEXAS INSTRUMENTS INC·Filed 1997·Granted Jan 26, 1999·118 cites·28 claims
- 0983US5953512AMicroprocessor circuits, systems, and methods implementing a loop and/or stride predicting load target bufferTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 14, 1999·114 cites·17 claims
- 1082US6108775ADynamically loadable pattern history tables in a multi-task microprocessorTEXAS INSTRUMENTS INC·Filed 1997·Granted Aug 22, 2000·107 cites·32 claims
- 1181US6029228AData prefetching of a load target buffer for post-branch instructions based on past prediction accuracy's of branch predictionsTEXAS INSTRUMENTS INC·Filed 1997·Granted Feb 22, 2000·98 cites·36 claims
- 1280US5951679AMicroprocessor circuits, systems, and methods for issuing successive iterations of a short backward branch loop in a single cycleTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 14, 1999·90 cites·44 claims
- 1380US5935241AMultiple global pattern history tables for branch prediction in a microprocessorTEXAS INSTRUMENTS INC·Filed 1997·Granted Aug 10, 1999·95 cites·24 claims
- 1479US6119222ACombined branch prediction and cache prefetch in a microprocessorTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 12, 2000·91 cites·20 claims
- 1577US5826084AMicroprocessor with circuits, systems, and methods for selectively bypassing external interrupts past the monitor program during virtual program operationTEXAS INSTRUMENTS INC·Filed 1997·Granted Oct 20, 1998·82 cites·38 claims
- 1676US6317820B1Dual-mode VLIW architecture providing a software-controlled varying mix of instruction-level and task-level parallelismTEXAS INSTRUMENTS INC·Filed 1999·Granted Nov 13, 2001·78 cites·9 claims
- 1774US6041176AEmulation devices utilizing state machinesTEXAS INSTRUMENTS INC·Filed 1998·Granted Mar 21, 2000·35 cites·32 claims
- 1874US5911057ASuperscalar microprocessor having combined register and memory renaming circuits, systems, and methodsTEXAS INSTRUMENTS INC·Filed 1996·Granted Jun 8, 1999·70 cites·26 claims
- 1971US6195735B1Prefetch circuity for prefetching variable size dataTEXAS INSTRUMENTS INC·Filed 1997·Granted Feb 27, 2001·59 cites·6 claims
- 2070US6412107B1Method and system of providing dynamic optimization information in a code interpretive runtime environmentTEXAS INSTRUMENTS INC·Filed 1999·Granted Jun 25, 2002·64 cites·4 claims
- 2170US5974440AMicroprocessor with circuits, systems, and methods for interrupt handling during virtual task operationTEXAS INSTRUMENTS INC·Filed 1997·Granted Oct 26, 1999·61 cites·34 claims
- 2269US6038645AMicroprocessor circuits, systems, and methods using a combined writeback queue and victim cacheTEXAS INSTRUMENTS INC·Filed 1997·Granted Mar 14, 2000·57 cites·32 claims
- 2364US6138232AMicroprocessor with rate of instruction operation dependent upon interrupt source for power consumption controlTEXAS INSTRUMENTS INC·Filed 1997·Granted Oct 24, 2000·45 cites·34 claims
- 2463US5951677AEfficient hardware implementation of euclidean array processing in reed-solomon decodingTEXAS INSTRUMENTS INC·Filed 1998·Granted Sep 14, 1999·43 cites·20 claims
- 2563US5799180AMicroprocessor circuits, systems, and methods passing intermediate instructions between a short forward conditional branch instruction and target instruction through pipeline, then suppressing results if branch takenTEXAS INSTRUMENTS INC·Filed 1996·Granted Aug 25, 1998·45 cites·34 claims
- 2662US6338137B1Data processor having memory access unit with predetermined number of instruction cycles between activation and initial data transferTEXAS INSTRUMENTS INC·Filed 1999·Granted Jan 8, 2002·41 cites·32 claims
- 2762US6085269AConfigurable expansion bus controller in a microprocessor-based systemTEXAS INSTRUMENTS INC·Filed 1997·Granted Jul 4, 2000·45 cites·17 claims
- 2861US6401212B1Microprocessor circuits, systems, and methods for conditioning information prefetching based on resource burdenTEXAS INSTRUMENTS INC·Filed 2000·Granted Jun 4, 2002·8 cites·7 claims
- 2961US5961632AMicroprocessor with circuits, systems, and methods for selecting alternative pipeline instruction paths based on instruction leading codesTEXAS INSTRUMENTS INC·Filed 1997·Granted Oct 5, 1999·38 cites·25 claims
- 3060US6178481B1Microprocessor circuits and systems with life spanned storage circuit for storing non-cacheable dataTEXAS INSTRUMENTS INC·Filed 1997·Granted Jan 23, 2001·37 cites·27 claims
- 3158US6065113ACircuits, systems, and methods for uniquely identifying a microprocessor at the instruction set level employing one-time programmable registerTEXAS INSTRUMENTS INC·Filed 1997·Granted May 16, 2000·37 cites·49 claims
- 3256US6173410B1Microprocessor circuits, systems and methods for conditioning information prefetching based on resource burdenTEXAS INSTRUMENTS INC·Filed 1997·Granted Jan 9, 2001·33 cites·13 claims
- 3355US6442667B1Selectively powering X Y organized memory banksTEXAS INSTRUMENTS INC·Filed 1999·Granted Aug 27, 2002·30 cites·1 claims
- 3455US6173368B1Class categorized storage circuit for storing non-cacheable data until receipt of a corresponding terminate signalTEXAS INSTRUMENTS INC·Filed 1998·Granted Jan 9, 2001·29 cites·28 claims
- 3552US5963721AMicroprocessor system with capability for asynchronous bus transactionsTEXAS INSTRUMENTS INC·Filed 1996·Granted Oct 5, 1999·26 cites·23 claims
- 3650US6212601B1Microprocessor system with block move circuit disposed between cache circuitsTEXAS INSTRUMENTS INC·Filed 1997·Granted Apr 3, 2001·23 cites·11 claims
- 3750US5954812AApparatus for caching system management memory in a computer having a system management mode employing address translationTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 21, 1999·23 cites·46 claims
- 3849US6449692B1Microprocessor circuits, systems, and methods with combined on-chip pixel and non-pixel cache structureTEXAS INSTRUMENTS INC·Filed 1998·Granted Sep 10, 2002·21 cites·13 claims
- 3949US6408320B1Instruction set architecture with versatile adder carry controlTEXAS INSTRUMENTS INC·Filed 1999·Granted Jun 18, 2002·21 cites·21 claims
- 4049US5909566AMicroprocessor circuits, systems, and methods for speculatively executing an instruction using its most recently used data while concurrently prefetching data for the instructionTEXAS INSTRUMENTS INC·Filed 1997·Granted Jun 1, 1999·23 cites·18 claims
- 4148US6065125ASMM power management circuits, systems, and methodsTEXAS INSTRUMENTS INC·Filed 1996·Granted May 16, 2000·20 cites·6 claims
- 4248US6032225AMicroprocessor system with burstable, non-cacheable memory access supportTEXAS INSTRUMENTS INC·Filed 1996·Granted Feb 29, 2000·21 cites·17 claims
- 4342US6064254AHigh speed integrated circuit interconnection having proximally located active converterTEXAS INSTRUMENTS INC·Filed 1997·Granted May 16, 2000·9 cites·12 claims
- 4438US5815697ACircuits, systems, and methods for reducing microprogram memory power for multiway branchingTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 29, 1998·10 cites·16 claims
- 4537US6170053B1Microprocessor with circuits, systems and methods for responding to branch instructions based on history of prediction accuracyTEXAS INSTRUMENTS INC·Filed 1997·Granted Jan 2, 2001·11 cites·30 claims
- 4637US5958046AMicroprocessor with reduced microcode space requirements due to improved branch target microaddress circuits, systems, and methodsTEXAS INSTRUMENTS INC·Filed 1996·Granted Sep 28, 1999·9 cites·38 claims
- 4730US5903742AMethod and circuit for redefining bits in a control registerTEXAS INSTRUMENTS INC·Filed 1996·Granted May 11, 1999·1 cites·8 claims
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