Inventor · disambiguated record
Jonathan Park
Also filed as: PARK JONATHAN · PARK JONATHAN C
17 granted patents·3 pending applications·154 citations·filing 1995–2016
93Inventor score
Top patents by PatentIndex Score
20 records- 0188US9577640B1Flexible, space-efficient I/O circuitry for integrated circuitsBAYSAND INC·Filed 2014·Granted Feb 21, 2017·14 cites·21 claims
- 0284US9811628B1Metal configurable register fileBAYSAND INC·Filed 2016·Granted Nov 7, 2017·7 cites·21 claims
- 0379US8773163B1Flexible, space-efficient I/O circuitry for integrated circuitsBAYSAND INC·Filed 2012·Granted Jul 8, 2014·4 cites·5 claims
- 0477US8533641B2Gate array architecture with multiple programmable regionsPARK JONATHAN C·Filed 2011·Granted Sep 10, 2013·12 cites·19 claims
- 0576US7165230B2Switch methodology for mask-programmable logic devicesALTERA CORP·Filed 2004·Granted Jan 16, 2007·21 cites·20 claims
- 0675US6938236B1Method of creating a mask-programmed logic device from a pre-existing circuit designALTERA CORP·Filed 2002·Granted Aug 30, 2005·32 cites·36 claims
- 0771US7689960B2Programmable via modelingEASIC CORP·Filed 2006·Granted Mar 30, 2010·8 cites·8 claims
- 0865US5990502AHigh density gate array cell architecture with metallization routing tracks having a variable pitchLSI LOGIC CORP·Filed 1995·Granted Nov 23, 1999·32 cites·20 claims
- 0963US8339844B2Programmable vias for structured ASICsSCHMIT HERMAN·Filed 2008·Granted Dec 25, 2012·2 cites·15 claims
- 1060US7759971B2Single via structured IC deviceEASIC CORP·Filed 2007·Granted Jul 20, 2010·3 cites·18 claims
- 1159US9590634B1Metal configurable hybrid memoryBAYSAND INC·Filed 2016·Granted Mar 7, 2017·1 cites·12 claims
- 1256US8001509B2Method for programming a mask-programmable logic device and device so programmedALTERA CORP·Filed 2007·Granted Aug 16, 2011·1 cites·11 claims
- 1356US6742172B2Mask-programmable logic devices with programmable gate array sitesALTERA CORP·Filed 2002·Granted May 25, 2004·7 cites·26 claims
- 1455US8788984B2Gate array architecture with multiple programmable regionsBAYSAND INC·Filed 2013·Granted Jul 22, 2014·1 cites·18 claims
- 1554US7290237B2Method for programming a mask-programmable logic device and device so programmedALTERA CORP·Filed 2004·Granted Oct 30, 2007·4 cites·37 claims
- 1653US6886143B1Method and apparatus for providing clock/buffer network in mask-programmable logic deviceALTERA CORP·Filed 2002·Granted Apr 26, 2005·5 cites·36 claims
- 1751US9166593B2Flexible, space-efficient I/O circuitry for integrated circuitsBAYSAND INC·Filed 2012·Granted Oct 20, 2015·0 cites·13 claims
- 1841US2015048425A1Gate array architecture with multiple programmable regionsBAYSAND INC·Filed 2014·Application pending·0 cites
- 1940US2018300175A1Gate array architecture with scalable transistor sizePARK JONATHAN·Filed 2014·Application pending·0 cites
- 2033US2004263205A1Mask-programmable logic devices with programmable gate array sitesALTERA CORP·Filed 2004·Application pending·0 cites
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