Inventor · disambiguated record
Shrey Bhatia
Also filed as: BHATIA SHREY · BHATIA SHREY SUDHIR
11 granted patents·3 pending applications·6 citations·filing 2012–2025
84Inventor score
Top patents by PatentIndex Score
14 records- 0186US10891207B2Processor with debug pipelineTEXAS INSTRUMENTS INC·Filed 2018·Granted Jan 12, 2021·3 cites·20 claims
- 0285US2025284606A1Processor with debug pipelineTEXAS INSTRUMENTS INC·Filed 2025·Application pending·0 cites
- 0381US12353308B2Processor with debug pipelineTEXAS INSTRUMENTS INC·Filed 2023·Granted Jul 8, 2025·0 cites·18 claims
- 0479US11803455B2Processor with debug pipelineTEXAS INSTRUMENTS INC·Filed 2023·Granted Oct 31, 2023·0 cites·20 claims
- 0574US12411694B2Processor having adaptive pipeline with latency reduction logic that selectively executes instructions to reduce latencyTEXAS INSTRUMENTS INC·Filed 2023·Granted Sep 9, 2025·0 cites·18 claims
- 0672US11593241B2Processor with debug pipelineTEXAS INSTRUMENTS INC·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 0769US9384109B2Processor with debug pipelineTEXAS INSTRUMENTS DEUTSCHLAND·Filed 2014·Granted Jul 5, 2016·1 cites·16 claims
- 0866US11645083B2Processor having adaptive pipeline with latency reduction logic that selectively executes instructions to reduce latencyTEXAS INSTRUMENTS INC·Filed 2013·Granted May 9, 2023·2 cites·12 claims
- 0966US2022035635A1Processor with multiple execution pipelinesTEXAS INSTRUMENTS INC·Filed 2021·Application pending·0 cites
- 1064US11150906B2Processor with a full instruction set decoder and a partial instruction set decoderTEXAS INSTRUMENTS INC·Filed 2019·Granted Oct 19, 2021·0 cites·17 claims
- 1159US10049025B2Processor with debug pipelineTEXAS INSTRUMENTS INC·Filed 2016·Granted Aug 14, 2018·0 cites·20 claims
- 1257US10437596B2Processor with a full instruction set decoder and a partial instruction set decoderTEXAS INSTRUMENTS INC·Filed 2014·Granted Oct 8, 2019·0 cites·18 claims
- 1349US9395985B2Efficient central processing unit (CPU) return address and instruction cacheTEXAS INSTRUMENTS DEUTSCHLAND·Filed 2014·Granted Jul 19, 2016·0 cites·20 claims
- 1437US2013173868A1Generation of Activation List for Memory Translation and Memory Access Protection in Industrial Ethernet StandardTEXAS INSTRUMENTS DEUTSCHLAND·Filed 2012·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →