Inventor

STENGL REINHARD

DE58 patents

⚠️ This page may combine multiple inventors who share the name “STENGL REINHARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

STENGL REINHARD

SIEMENS AG

Memory cell configuration and method for its fabrication

Bottle-shaped trench capacitor with epi buried layer

Electrically programmable non-volatile memory cell configuration

Trench capacitor with epi buried layer

Buried-strap formation in a dram trench capacitor

Method for producing a laterally limited single-crystal region with selective epitaxy and the employment thereof for manufacturing a bipolar transistor as well as a MOS transistor

Planar pn-junction of high electric strength

Method for manufacturing an electrically conductive tip composed of a doped semiconductor material

Method of operating a storage cell arrangement

Method for manufacturing fine structures

Method for manufacturing a solar cell from a substrate wafer

Method for the fabrication of a doped silicon layer

Manufacturing method for a capacitor in an integrated storage circuit

Buried strap formation in a DRAM trench capacitor

Method for producing a semiconductor layer structure having a planarized surface and the use thereof in the manufacture of bipolar transistors and DRAMS

Method for manufacturing a component with porous silicon

Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor

Method for the manufacture of a pn junction with high breakdown voltage

Manufacturing method for a capacitor in an integrated memory circuit

Method for fabricating a capacitor for a semiconductor memory configuration

Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor

Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor

Process of forming a semiconductor capacitor including forming a hemispherical grain statistical mask with silicon and germanium

Method for fabricating a dopant region

Method for producing a DRAM cellular arrangement

Method for manufacturing a capacitor for a semiconductor arrangement

Process for manufacturing capacitors in a solid state configuration

Semiconductor component comprising a planar pn-junction

Method for producing a silicon capacitor

Integrated electrical circuit having at least one memory cell and method for fabricating it

INFINEON TECHNOLOGIES AG

Memory device for storing electrical charge and method for fabricating the same

Method for fabricating a bipolar transistor and method for fabricating an integrated circuit configuration having such a bipolar transistor

High-frequency bipolar transistor

Optical structure and method for producing the same

Method of producing an open form

Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor

Method for producing a transistor structure

Ferroelectric transistor and memory cell configuration with the ferroelectric transistor

Bipolar transistor comprising carbon-doped semiconductor

Method for the production of a bipolar transistor

High-frequency bipolar transistor and method for the production thereof

Integrated coolant circuit arrangement, operating method and production method

Bipolar transistor and method for fabricating it

Bipolar transistor and method of fabricating a bipolar transistor

Method for fabricating a transistor structure

Reactor configuration and method for producing it

Ferroelectric transistor, use thereof in a memory cell configuration and method of producing the ferroelectric transistor

Capacitor for semiconductor configuration and method for fabricating a dielectric layer therefor

Method for the production of a bipolar semiconductor component, especially a bipolar transistor, and corresponding bipolar semiconductor component

IBM

Method for suppressing pattern distortion associated with BPSG reflow and integrated circuit chip formed thereby