Inventor

REISINGER HANS

DE42 patents

⚠️ This page may combine multiple inventors who share the name “REISINGER HANS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

REISINGER HANS

SIEMENS AG

Memory cell configuration and method for its fabrication

Method for operating a non-volatile memory cell arrangement

Electrically programmable memory cell arrangement and method for its manufacture

Method of manufacturing a perforated workpiece

Electrically programmable non-volatile memory cell configuration

Electrically programmable memory cell configuration

Method of operating a storage cell arrangement

Method for manufacturing fine structures

Method for the fabrication of a doped silicon layer

Manufacturing method for a capacitor in an integrated storage circuit

Manufacturing method for a capacitor in an integrated memory circuit

Method for fabricating a capacitor for a semiconductor memory configuration

Memory cell arrangement and process for manufacturing the same

Method for the manufacturing a memory cell configuration

Process of forming a semiconductor capacitor including forming a hemispherical grain statistical mask with silicon and germanium

Method for fabricating a dopant region

Method for manufacturing a capacitor for a semiconductor arrangement

Method for manufacturing a silicon capacitor by thinning

Method for manufacturing a multi-layer capacitor

Method for producing a silicon capacitor

Integrated electrical circuit having at least one memory cell and method for fabricating it

Method for manufacturing an electrically writeable and erasable read-only memory cell arrangement

Configuration for driving parallel lines in a memory cell configuration

INFINEON TECHNOLOGIES AG

Electrically programmable memory cell array, using charge carrier traps and insulation trenches

Charge-trapping memory device including high permittivity strips

Memory device for storing electrical charge and method for fabricating the same

Memory cell arrangement

Integrated circuit configuration having at least one capacitor and method for producing the same

Perforated work piece, and method for producing it

Optical structure and method for producing the same

Method of producing an open form

Memory cell configuration and method for fabricating it

Ferroelectric transistor and memory cell configuration with the ferroelectric transistor

Charge-trapping memory device and methods for operating and manufacturing the cell

Reactor configuration and method for producing it

Ferroelectric transistor, use thereof in a memory cell configuration and method of producing the ferroelectric transistor

Capacitor for semiconductor configuration and method for fabricating a dielectric layer therefor

Memory cell configuration with capacitor on opposite surface of substrate and method for fabricating the same

Semiconductor device having an optical device degradation sensor

Storage capacitor for a DRAM

Method for fabricating a memory cell configuration

DRAM memory capacitor having three-layer dielectric, and method for its production