Inventor · disambiguated record
Robert John Stephenson
Also filed as: STEPHENSON ROBERT · STEPHENSON ROBERT C · STEPHENSON ROBERT J · STEPHENSON ROBERT JOHN
51 granted patents·16 pending applications·2,738 citations·filing 1995–2025
99Inventor score
Files withATOMERA INC29RJ MEARS LLC13MEARS TECHNOLOGIES INC9MUDDY RIVER TECH INC4MCKAY CREEK TECHNOLOGIES LTD3
Top patents by PatentIndex Score
67 records- 0199US11978771B2Gate-all-around (GAA) device including a superlatticeATOMERA INC·Filed 2022·Granted May 7, 2024·7 cites·21 claims
- 0299US11848356B2Method for making semiconductor device including superlattice with oxygen and carbon monolayersATOMERA INC·Filed 2021·Granted Dec 19, 2023·6 cites·21 claims
- 0399US11837634B2Semiconductor device including superlattice with oxygen and carbon monolayersATOMERA INC·Filed 2021·Granted Dec 5, 2023·10 cites·21 claims
- 0499US11430869B2Method for making superlattice structures with reduced defect densitiesATOMERA INC·Filed 2020·Granted Aug 30, 2022·8 cites·13 claims
- 0599US10109479B1Method of making a semiconductor device with a buried insulating layer formed by annealing a superlatticeATOMERA INC·Filed 2017·Granted Oct 23, 2018·82 cites·23 claims
- 0698US11664427B2Vertical semiconductor device with enhanced contact structure and associated methodsATOMERA INC·Filed 2022·Granted May 30, 2023·7 cites·32 claims
- 0798US11387325B2Vertical semiconductor device with enhanced contact structure and associated methodsATOMERA INC·Filed 2020·Granted Jul 12, 2022·12 cites·35 claims
- 0898US11075078B1Method for making a semiconductor device including a superlattice within a recessed etchATOMERA INC·Filed 2020·Granted Jul 27, 2021·21 cites·24 claims
- 0998US10884185B2Semiconductor device including vertically integrated optical and electronic devices and comprising a superlatticeATOMERA INC·Filed 2019·Granted Jan 5, 2021·19 cites·20 claims
- 1098US10879356B2Method for making a semiconductor device including enhanced contact structures having a superlatticeATOMERA INC·Filed 2019·Granted Dec 29, 2020·21 cites·26 claims
- 1198US10811498B2Method for making superlattice structures with reduced defect densitiesATOMERA INC·Filed 2018·Granted Oct 20, 2020·35 cites·16 claims
- 1298US10777451B2Semiconductor device including enhanced contact structures having a superlatticeATOMERA INC·Filed 2019·Granted Sep 15, 2020·30 cites·27 claims
- 1398US10763370B2Inverted T channel field effect transistor (ITFET) including a superlatticeATOMERA INC·Filed 2019·Granted Sep 1, 2020·30 cites·21 claims
- 1498US10741436B2Method for making a semiconductor device including non-monocrystalline stringer adjacent a superlattice-sti interfaceATOMERA INC·Filed 2018·Granted Aug 11, 2020·30 cites·23 claims
- 1598US10727049B2Method for making a semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlatticeATOMERA INC·Filed 2018·Granted Jul 28, 2020·30 cites·25 claims
- 1698US10566191B1Semiconductor device including superlattice structures with reduced defect densitiesATOMERA INC·Filed 2018·Granted Feb 18, 2020·51 cites·22 claims
- 1798US10468245B2Semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlatticeATOMERA INC·Filed 2018·Granted Nov 5, 2019·46 cites·25 claims
- 1898US8389974B2Multiple-wavelength opto-electronic device including a superlatticeMEARS ROBERT J·Filed 2011·Granted Mar 5, 2013·109 cites·34 claims
- 1998US7880161B2Multiple-wavelength opto-electronic device including a superlatticeMEARS TECHNOLOGIES INC·Filed 2007·Granted Feb 1, 2011·121 cites·25 claims
- 2098US7863066B2Method for making a multiple-wavelength opto-electronic device including a superlatticeMEARS TECHNOLOGIES INC·Filed 2007·Granted Jan 4, 2011·110 cites·25 claims
- 2198US7718996B2Semiconductor device comprising a lattice matching layerMEARS TECHNOLOGIES INC·Filed 2007·Granted May 18, 2010·110 cites·26 claims
- 2298US7700447B2Method for making a semiconductor device comprising a lattice matching layerMEARS TECHNOLOGIES INC·Filed 2007·Granted Apr 20, 2010·113 cites·28 claims
- 2398US7517702B2Method for making an electronic device including a poled superlattice having a net electrical dipole momentMEARS TECHNOLOGIES INC·Filed 2006·Granted Apr 14, 2009·130 cites·27 claims
- 2498US7446002B2Method for making a semiconductor device comprising a superlattice dielectric interface layerMEARS TECHNOLOGIES INC·Filed 2005·Granted Nov 4, 2008·120 cites·21 claims
- 2598US7446334B2Electronic device comprising active optical devices with an energy band engineered superlatticeMEARS TECHNOLOGIES INC·Filed 2004·Granted Nov 4, 2008·110 cites·25 claims
- 2698US7432524B2Integrated circuit comprising an active optical device having an energy band engineered superlatticeMEARS TECHNOLOGIES INC·Filed 2004·Granted Oct 7, 2008·111 cites·34 claims
- 2798US7279699B2Integrated circuit comprising a waveguide having an energy band engineered superlatticeRJ MEARS LLC·Filed 2004·Granted Oct 9, 2007·110 cites·30 claims
- 2898US7229902B2Method for making a semiconductor device including a superlattice with regions defining a semiconductor junctionRJ MEARS LLC·Filed 2005·Granted Jun 12, 2007·110 cites·26 claims
- 2998US7227174B2Semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junctionRJ MEARS LLC·Filed 2005·Granted Jun 5, 2007·113 cites·20 claims
- 3098US7153763B2Method for making a semiconductor device including band-engineered superlattice using intermediate annealingRJ MEARS LLC·Filed 2005·Granted Dec 26, 2006·119 cites·31 claims
- 3198US7109052B2Method for making an integrated circuit comprising a waveguide having an energy band engineered superlatticeRJ MEARS LLC·Filed 2004·Granted Sep 19, 2006·113 cites·30 claims
- 3298US7045813B2Semiconductor device including a superlattice with regions defining a semiconductor junctionRJ MEARS LLC·Filed 2005·Granted May 16, 2006·110 cites·20 claims
- 3398US7045377B2Method for making a semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junctionRJ MEARS LLC·Filed 2005·Granted May 16, 2006·110 cites·20 claims
- 3496US11355667B2Method for making semiconductor device including vertically integrated optical and electronic devices and comprising a superlatticeATOMERA INC·Filed 2019·Granted Jun 7, 2022·11 cites·23 claims
- 3596US9558939B1Methods for making a semiconductor device including atomic layer structures using N2O as an oxygen sourceATOMERA INC·Filed 2016·Granted Jan 31, 2017·106 cites·25 claims
- 3695US9721790B2Method for making enhanced semiconductor structures in single wafer processing chamber with desired uniformity controlATOMERA INC·Filed 2016·Granted Aug 1, 2017·11 cites·33 claims
- 3795US6346197B1Water and wastewater treatment system and process for contaminant removalMCKAY CREEK TECHNOLOGIES LTD·Filed 2000·Granted Feb 12, 2002·129 cites·81 claims
- 3894US11664459B2Method for making an inverted T channel field effect transistor (ITFET) including a superlatticeATOMERA INC·Filed 2019·Granted May 30, 2023·7 cites·24 claims
- 3993US6663783B2Electrochemical cell for removing contaminants from a wastewater streamMCKAY CREEK TECHNOLOGIES LTD·Filed 2002·Granted Dec 16, 2003·63 cites·7 claims
- 4091US2025048701A1Method for making gate-all-around (gaa) device including a superlatticeATOMERA INC·Filed 2024·Application pending·0 cites
- 4189US12119380B2Method for making semiconductor device including superlattice with oxygen and carbon monolayersATOMERA INC·Filed 2023·Granted Oct 15, 2024·0 cites·15 claims
- 4288US9809480B2Wastewater treatment process and systemPARADIGM ENV TECH INC·Filed 2015·Granted Nov 7, 2017·16 cites·63 claims
- 4388US2024194740A1Gate-all-around (gaa) device including a superlatticeATOMERA INC·Filed 2024·Application pending·0 cites
- 4484US12142641B2Method for making gate-all-around (GAA) device including a superlatticeATOMERA INC·Filed 2022·Granted Nov 12, 2024·0 cites·21 claims
- 4579US12315722B2Method for making a radio frequency silicon-on-insulator (RFSOI) wafer including a superlatticeATOMERA INC·Filed 2024·Granted May 27, 2025·0 cites·19 claims
- 4677US6495048B2Water and wastewater treatment system and process for contaminant removalMCKAY CREEK TECHNOLOGIES LTD·Filed 2002·Granted Dec 17, 2002·17 cites·1 claims
- 4777US6082548AMobile soil treatment apparatus and methodCHEMTECH ANALYSIS INC·Filed 1996·Granted Jul 4, 2000·46 cites·40 claims
- 4875US2025259840A1Method for making a radio frequency silicon-on-insulator (rfsoi) wafer including a superlatticeATOMERA INC·Filed 2025·Application pending·0 cites
- 4974US5599137AMobile soil treatment apparatus and methodCHEMTECH ANALYSIS INC·Filed 1995·Granted Feb 4, 1997·39 cites·25 claims
- 5067US9145315B2Wastewater treatment process and systemPARADIGM ENVIRONMENTAL TECHNOLOGIES INC·Filed 2013·Granted Sep 29, 2015·2 cites·65 claims
Showing the top 50 of 67 patent records by PatentIndex Score.
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