Inventor · disambiguated record
Dean C. Regan
Also filed as: REGAN DEAN · REGAN DEAN C
14 granted patents·2 pending applications·165 citations·filing 2011–2024
93Inventor score
Top patents by PatentIndex Score
16 records- 0196US8946724B1Monolithically integrated self-aligned GaN-HEMTs and Schottky diodes and method of fabricating the sameHRL LAB LLC·Filed 2013·Granted Feb 3, 2015·37 cites·18 claims
- 0294US8383471B1Self aligned sidewall gate GaN HEMTHRL LAB LLC·Filed 2011·Granted Feb 26, 2013·28 cites·27 claims
- 0393US10998273B2Hybrid integrated circuit architectureHRL LAB LLC·Filed 2018·Granted May 4, 2021·14 cites·19 claims
- 0493US10170611B1T-gate field effect transistor with non-linear channel layer and/or gate foot faceHRL LAB LLC·Filed 2016·Granted Jan 1, 2019·16 cites·15 claims
- 0591US10868162B1Self-aligned gallium nitride FinFET and method of fabricating the sameHRL LAB LLC·Filed 2018·Granted Dec 15, 2020·8 cites·11 claims
- 0691US9202880B1Etch-based fabrication process for stepped field-plate wide-bandgapHRL LAB LLC·Filed 2013·Granted Dec 1, 2015·10 cites·16 claims
- 0789US9515161B1Monolithically integrated self-aligned GaN-HEMTs and schottky diodes and method of fabricating the sameHRL LAB LLC·Filed 2014·Granted Dec 6, 2016·8 cites·8 claims
- 0888US9449833B1Methods of fabricating self-aligned FETS using multiple sidewall spacersHRL LAB LLC·Filed 2013·Granted Sep 20, 2016·10 cites·28 claims
- 0987US9419122B1Etch-based fabrication process for stepped field-plate wide-bandgapHRL LAB LLC·Filed 2015·Granted Aug 16, 2016·4 cites·7 claims
- 1087US8558281B1Gate metallization methods for self-aligned sidewall gate GaN HEMTREGAN DEAN C·Filed 2011·Granted Oct 15, 2013·15 cites·10 claims
- 1186US8980759B1Method of fabricating slanted field-plate GaN heterojunction field-effect transistorHRL LAB LLC·Filed 2014·Granted Mar 17, 2015·7 cites·23 claims
- 1280US8698201B1Gate metallization methods for self-aligned sidewall gate GaN HEMTHRL LAB LLC·Filed 2013·Granted Apr 15, 2014·5 cites·15 claims
- 1368US8766321B2Self-aligned sidewall gate GaN HEMTHRL LAB·Filed 2012·Granted Jul 1, 2014·2 cites·6 claims
- 1462US9093394B1Method and structure for encapsulation and interconnection of transistorsHRL LAB LLC·Filed 2013·Granted Jul 28, 2015·1 cites·11 claims
- 1560US2024379834A1Recessed-gate high-electron-mobility transistors with doped barriers and round gate foot cornersTELEDYNE SCIENT & IMAGING LLC·Filed 2024·Application pending·0 cites
- 1654US2023411505A1High linearity fet with buried gate structures and tapered channel layerTELEDYNE SCIENT & IMAGING LLC·Filed 2023·Application pending·0 cites
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