Inventor · disambiguated record
Gilbert M. Wolrich
Also filed as: WOLRICH GILBERT · WOLRICH GILBERT M
270 granted patents·36 pending applications·5,493 citations·filing 1983–2023
99Inventor score
Top patents by PatentIndex Score
306 records- 0198US10042639B2Method and apparatus to process 4-operand SIMD integer multiply-accumulate instructionINTEL CORP·Filed 2017·Granted Aug 7, 2018·39 cites·24 claims
- 0297US9584155B1Look-ahead hash chain matching for data compressionINTEL CORP·Filed 2015·Granted Feb 28, 2017·21 cites·25 claims
- 0397US9419648B1Supporting data compression using match scoringINTEL CORP·Filed 2015·Granted Aug 16, 2016·18 cites·20 claims
- 0497US9235414B2SIMD integer multiply-accumulate instruction for multi-precision arithmeticGOPAL VINODH·Filed 2011·Granted Jan 12, 2016·53 cites·21 claims
- 0596US6868476B2Software controlled content addressable memory in a general purpose execution datapathINTEL CORP·Filed 2002·Granted Mar 15, 2005·105 cites·22 claims
- 0696US6728845B2SRAM controller for parallel processor architecture and method for controlling access to a RAM using read and read/write queuesINTEL CORP·Filed 2002·Granted Apr 27, 2004·119 cites·18 claims
- 0796US6694380B1Mapping requests from a processing unit that uses memory-mapped input-output spaceINTEL CORP·Filed 1999·Granted Feb 17, 2004·227 cites·27 claims
- 0896US6667920B2Scratchpad memoryINTEL CORP·Filed 2003·Granted Dec 23, 2003·76 cites·15 claims
- 0996US5811998AState machine phase lock loopDIGITAL EQUIPMENT CORP·Filed 1995·Granted Sep 22, 1998·117 cites·25 claims
- 1095US10686591B2Instruction and logic to provide SIMD secure hashing round slice functionalityINTEL CORP·Filed 2018·Granted Jun 16, 2020·9 cites·25 claims
- 1195US9960917B2Matrix multiply accumulate instructionGOPAL VINODH·Filed 2011·Granted May 1, 2018·39 cites·24 claims
- 1295US9473168B1Systems, methods, and apparatuses for compression using hardware and softwareGOPAL VINODH·Filed 2015·Granted Oct 18, 2016·14 cites·16 claims
- 1395US6587906B2Parallel multi-threaded processingINTEL CORP·Filed 2003·Granted Jul 1, 2003·84 cites·17 claims
- 1495US6577542B2Scratchpad memoryINTEL CORP·Filed 2001·Granted Jun 10, 2003·74 cites·19 claims
- 1594US6681300B2Read lock miss control and queue managementINTEL CORP·Filed 2001·Granted Jan 20, 2004·89 cites·18 claims
- 1694US6606704B1Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcodeINTEL CORP·Filed 1999·Granted Aug 12, 2003·192 cites·17 claims
- 1794US6307789B1Scratchpad memoryINTEL CORP·Filed 1999·Granted Oct 23, 2001·79 cites·22 claims
- 1893US8924741B2Instruction and logic to provide SIMD secure hashing round slice functionalityINTEL CORP·Filed 2012·Granted Dec 30, 2014·16 cites·31 claims
- 1993US7418571B2Memory interleavingINTEL CORP·Filed 2005·Granted Aug 26, 2008·33 cites·16 claims
- 2093US6631462B1Memory shared between processing threadsINTEL CORP·Filed 2000·Granted Oct 7, 2003·74 cites·29 claims
- 2193US6625654B1Thread signaling in multi-threaded network processorINTEL CORP·Filed 1999·Granted Sep 23, 2003·164 cites·16 claims
- 2292US7743235B2Processor having a dedicated hash unit integrated withinINTEL CORP·Filed 2007·Granted Jun 22, 2010·25 cites·7 claims
- 2392US7434221B2Multi-threaded sequenced receive for fast network port stream of packetsINTEL CORP·Filed 2005·Granted Oct 7, 2008·26 cites·14 claims
- 2492US7424579B2Memory controller for processor having multiple multithreaded programmable unitsINTEL CORP·Filed 2005·Granted Sep 9, 2008·25 cites·8 claims
- 2592US7216204B2Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environmentINTEL CORP·Filed 2002·Granted May 8, 2007·76 cites·20 claims
- 2692US6668317B1Microengine for parallel processor architectureINTEL CORP·Filed 1999·Granted Dec 23, 2003·157 cites·41 claims
- 2792US6532509B1Arbitrating command requests in a parallel multi-threaded processing systemINTEL CORP·Filed 1999·Granted Mar 11, 2003·150 cites·35 claims
- 2892US6427196B1SRAM controller for parallel processor architecture including address and command queue and arbiterINTEL CORP·Filed 1999·Granted Jul 30, 2002·152 cites·17 claims
- 2991US9658854B2Instructions and logic to provide SIMD SM3 cryptographic hashing functionalityINTEL CORP·Filed 2014·Granted May 23, 2017·12 cites·49 claims
- 3091US9467279B2Instructions and logic to provide SIMD SM4 cryptographic block cipher functionalityINTEL CORP·Filed 2014·Granted Oct 11, 2016·10 cites·37 claims
- 3191US9027104B2Instructions processors, methods, and systems to process secure hash algorithmsINTEL CORP·Filed 2013·Granted May 5, 2015·9 cites·23 claims
- 3291US7366865B2Enqueueing entries in a packet queue referencing packetsINTEL CORP·Filed 2004·Granted Apr 29, 2008·67 cites·42 claims
- 3391US6952824B1Multi-threaded sequenced receive for fast network port stream of packetsINTEL CORP·Filed 2000·Granted Oct 4, 2005·65 cites·7 claims
- 3491US6629237B2Solving parallel problems employing hardware multi-threading in a parallel processing environmentINTEL CORP·Filed 2001·Granted Sep 30, 2003·73 cites·23 claims
- 3590US9768802B2Look-ahead hash chain matching for data compressionINTEL CORP·Filed 2017·Granted Sep 19, 2017·8 cites·22 claims
- 3690US9503256B2SMS4 acceleration hardwareINTEL CORP·Filed 2014·Granted Nov 22, 2016·11 cites·20 claims
- 3790US7546444B1Register set used in multithreaded parallel processor architectureINTEL CORP·Filed 2000·Granted Jun 9, 2009·59 cites·20 claims
- 3890US7246197B2Software controlled content addressable memory in a general purpose execution datapathINTEL CORP·Filed 2005·Granted Jul 17, 2007·20 cites·18 claims
- 3990US6934951B2Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical sectionINTEL CORP·Filed 2002·Granted Aug 23, 2005·54 cites·25 claims
- 4090US6876561B2Scratchpad memoryINTEL CORP·Filed 2003·Granted Apr 5, 2005·35 cites·13 claims
- 4189US9537504B1Heterogeneous compression architecture for optimized compression ratioINTEL CORP·Filed 2015·Granted Jan 3, 2017·8 cites·22 claims
- 4289US9361106B2SMS4 acceleration processors, methods, systems, and instructionsINTEL CORP·Filed 2013·Granted Jun 7, 2016·11 cites·23 claims
- 4389US9270698B2Filter for network intrusion and virus detectionGOPAL VINODH·Filed 2008·Granted Feb 23, 2016·19 cites·24 claims
- 4489US8020142B2Hardware acceleratorINTEL CORP·Filed 2006·Granted Sep 13, 2011·21 cites·23 claims
- 4589US7725624B2System and method for cryptography processing units and multiplierINTEL CORP·Filed 2005·Granted May 25, 2010·20 cites·20 claims
- 4689US7111296B2Thread signaling in multi-threaded processorINTEL CORP·Filed 2003·Granted Sep 19, 2006·45 cites·27 claims
- 4789US5418973ADigital computer system with cache controller coordinating both vector and scalar operationsDIGITAL EQUIPMENT CORP·Filed 1992·Granted May 23, 1995·163 cites·7 claims
- 4888US10169073B2Hardware accelerators and methods for stateful compression and decompression operationsINTEL CORP·Filed 2015·Granted Jan 1, 2019·7 cites·24 claims
- 4988US10158484B2Instructions and logic to provide SIMD SM4 cryptographic block cipher functionalityINTEL CORP·Filed 2016·Granted Dec 18, 2018·4 cites·25 claims
- 5087US9047082B2Instruction-set architecture for programmable Cyclic Redundancy Check (CRC) computationsINTEL CORP·Filed 2014·Granted Jun 2, 2015·7 cites·20 claims
Showing the top 50 of 306 patent records by PatentIndex Score.
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