Inventor
GREWAL KARANVIR
US33 patents
⚠️ This page may combine multiple inventors who share the name “GREWAL KARANVIR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
23 patentsUS10860709B2Dec 8, 2020
Encoded inline capabilities
INTEL CORP25 citations93
US7739724B2Jun 15, 2010
Techniques for authenticated posture reporting and associated enforcement of network access
INTEL CORP32 citations93
US8375430B2Feb 12, 2013
Roaming secure authenticated network access method and apparatus
INTEL CORP23 citations92
US7827593B2Nov 2, 2010
Methods, apparatuses, and systems for the dynamic evaluation and delegation of network access control
INTEL CORP17 citations92
US7814531B2Oct 12, 2010
Detection of network environment for network access control
INTEL CORP21 citations89
US7703126B2Apr 20, 2010
Hierarchical trust based posture reporting and policy enforcement
INTEL CORP10 citations84
US7483423B2Jan 27, 2009
Authenticity of communications traffic
INTEL CORP18 citations84
US11469902B2Oct 11, 2022
Systems and methods of using cryptographic primitives for error location, correction, and device recovery
INTEL CORP3 citations73
US10498865B2Dec 3, 2019
Security-oriented compression
INTEL CORP3 citations71
US12066888B2Aug 20, 2024
Efficient security metadata encoding in error correcting code (ECC) memory without dedicated ECC bits
INTEL CORP0 citations62
US11562063B2Jan 24, 2023
Encoded inline capabilities
INTEL CORP0 citations62
US11003584B2May 11, 2021
Technology for managing memory tags
INTEL CORP1 citations62
US10761928B2Sep 1, 2020
Combined secure mac and device correction using encrypted parity with multi-key domains
INTEL CORP1 citations62
US10691482B2Jun 23, 2020
Systems, methods, and apparatus for securing virtual machine control structures
INTEL CORP1 citations62
US10565370B2Feb 18, 2020
System and method for enabling secure memory transactions using enclaves
INTEL CORP1 citations62
US12578889B2Mar 17, 2026
Apparatus, device, and method for a memory controller, memory controller, and system
INTEL CORP0 citations60
US12254203B2Mar 18, 2025
Message authentication Galois integrity and correction (MAGIC) for lightweight row hammer mitigation
INTEL CORP0 citations60
US12045128B1Jul 23, 2024
Secure error correcting code (ECC) trust execution environment (TEE) configuration metadata encoding
INTEL CORP0 citations52
US11995006B2May 28, 2024
Algebraic and deterministic memory authentication and correction with coupled cacheline metadata
INTEL CORP0 citations52
US11019098B2May 25, 2021
Replay protection for memory based on key refresh
INTEL CORP0 citations52
US10079813B2Sep 18, 2018
Method and apparatus for secure network enclaves
INTEL CORP0 citations52
US10855815B2Dec 1, 2020
Security-oriented compression
INTEL CORP0 citations50
US10757227B2Aug 25, 2020
Security-oriented compression
INTEL CORP0 citations50