Inventor · disambiguated record
Chin Kun Lan
Also filed as: LAN CHIN K · LAN CHIN KUN
19 granted patents·5 pending applications·65 citations·filing 1998–2025
92Inventor score
Top patents by PatentIndex Score
24 records- 0195US10879456B2Sidewall spacer stack for magnetic tunnel junctionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 29, 2020·5 cites·20 claims
- 0289US10510586B1Multi-layer structure having a dense middle layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 17, 2019·4 cites·20 claims
- 0387US12315812B2Semiconductor structure having high breakdown voltage etch-stop layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted May 27, 2025·0 cites·20 claims
- 0486US12268096B2Spacer stack for magnetic tunnel junctionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Apr 1, 2025·0 cites·20 claims
- 0585US7968431B2Diffusion region routing for narrow scribe-line devicesTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Jun 28, 2011·11 cites·18 claims
- 0684US2025285977A1Semiconductor structure having high breakdown voltage etch-stop layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0782US11139200B2Multi-layer structure having a dense middle layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Oct 5, 2021·2 cites·20 claims
- 0880US11961803B2Semiconductor structure having high breakdown voltage etch-stop layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Apr 16, 2024·0 cites·20 claims
- 0979US12310257B2Spacer scheme and method for MRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted May 20, 2025·0 cites·20 claims
- 1079US2024381784A1Spacer scheme and method for mramTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1179US2025204265A1Spacer Stack For Magnetic Tunnel JunctionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1276US10748765B2Multi-layer mask and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Aug 18, 2020·1 cites·20 claims
- 1374US11785858B2Methods for forming a spacer stack for magnetic tunnel junctionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Oct 10, 2023·0 cites·20 claims
- 1472US11818964B2Spacer scheme and method for MRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Nov 14, 2023·0 cites·20 claims
- 1570US8669641B2Diffusion region routing for narrow scribe-line devicesHSIEH MING-CHANG·Filed 2011·Granted Mar 11, 2014·3 cites·18 claims
- 1667US11488825B2Multi-layer mask and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 1, 2022·0 cites·20 claims
- 1767US7955993B2Oxygen plasma reduction to eliminate precursor overflow in BPTEOS film depositionTAIWAN SEMICONDUCTOR MFG·Filed 2009·Granted Jun 7, 2011·2 cites·18 claims
- 1866US11283005B2Spacer scheme and method for MRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Mar 22, 2022·0 cites·21 claims
- 1965US11769692B2High breakdown voltage inter-metal dielectric layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Sep 26, 2023·0 cites·20 claims
- 2056US6407007B1Method to solve the delamination of a silicon nitride layer from an underlying spin on glass layerTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Jun 18, 2002·21 cites·18 claims
- 2153US6645825B1Planarization of shallow trench isolation (STI)TAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Nov 11, 2003·6 cites·13 claims
- 2243US6287172B1Method for improvement of tungsten chemical-mechanical polishing processTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Sep 11, 2001·10 cites·6 claims
- 2342US2007190742A1Semiconductor device including shallow trench isolator and method of forming sameTAIWAN SEMICONDUCTOR MFG·Filed 2006·Application pending·0 cites
- 2442US2008061343A1Metal-oxide-metal structure with improved capacitive coupling areaTAIWAN SEMICONDUCTOR MFG·Filed 2006·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →