Inventor · disambiguated record
Matthias Ringe
Also filed as: RINGE MATTHIAS
46 granted patents·135 citations·filing 2005–2021
97Inventor score
Top patents by PatentIndex Score
46 records- 0197US10326435B2Dynamic control of edge shift for duty cycle correctionIBM·Filed 2017·Granted Jun 18, 2019·24 cites·9 claims
- 0295US10063222B1Dynamic control of edge shift for duty cycle correctionIBM·Filed 2017·Granted Aug 28, 2018·14 cites·11 claims
- 0391US10148259B1Skew sensor with enhanced reliabilityIBM·Filed 2017·Granted Dec 4, 2018·6 cites·8 claims
- 0489US10564664B2Integrated skew controlIBM·Filed 2017·Granted Feb 18, 2020·6 cites·11 claims
- 0588US10175297B2Measuring a slew rate on-chipIBM·Filed 2016·Granted Jan 8, 2019·4 cites·20 claims
- 0685US8037441B2Gridded-router based wiring on a non-gridded libraryIBM·Filed 2008·Granted Oct 11, 2011·17 cites·16 claims
- 0784US11256284B2Integrated skew controlIBM·Filed 2020·Granted Feb 22, 2022·2 cites·18 claims
- 0881US10348279B2Skew controlIBM·Filed 2017·Granted Jul 9, 2019·3 cites·3 claims
- 0980US10348278B2Method and apparatus for clock skew control with low jitter in an integrated circuitIBM·Filed 2018·Granted Jul 9, 2019·2 cites·20 claims
- 1080US7865855B2Method and system for generating a layout for an integrated electronic circuitIBM·Filed 2007·Granted Jan 4, 2011·10 cites·9 claims
- 1179US9916409B2Generating a layout for an integrated circuitIBM·Filed 2015·Granted Mar 13, 2018·2 cites·10 claims
- 1278US8566771B1Automation of interconnect and routing customizationIBM·Filed 2012·Granted Oct 22, 2013·5 cites·20 claims
- 1377US11022998B2Optimally driving non-uniform clock mesh loadsIBM·Filed 2018·Granted Jun 1, 2021·2 cites·20 claims
- 1476US11163002B2Burn-in resilient integrated circuit for processorsIBM·Filed 2018·Granted Nov 2, 2021·2 cites·6 claims
- 1576US10355683B2Correcting duty cycle and compensating for active clock edge shiftIBM·Filed 2017·Granted Jul 16, 2019·2 cites·4 claims
- 1675US10158351B1Skew control apparatus and algorithm using a low pass filterIBM·Filed 2017·Granted Dec 18, 2018·2 cites·19 claims
- 1774US10546094B2Generating a layout for an integrated circuitIBM·Filed 2018·Granted Jan 28, 2020·1 cites·20 claims
- 1874US8912824B1Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuitIBM·Filed 2013·Granted Dec 16, 2014·3 cites·8 claims
- 1974US7526743B2Method for routing data paths in a semiconductor chip with a plurality of layersIBM·Filed 2005·Granted Apr 28, 2009·9 cites·25 claims
- 2073US10110205B2Method and apparatus for clock skew control with low jitter in an integrated circuitIBM·Filed 2016·Granted Oct 23, 2018·1 cites·17 claims
- 2172US10684642B2Adaptive clock mesh wiringIBM·Filed 2018·Granted Jun 16, 2020·1 cites·25 claims
- 2271US7844931B2Method and computer system for optimizing the signal time behavior of an electronic circuit designIBM·Filed 2008·Granted Nov 30, 2010·6 cites·9 claims
- 2370US11921157B2Burn-in resilient integrated circuit for processorsIBM·Filed 2021·Granted Mar 5, 2024·0 cites·6 claims
- 2470US9306547B2Duty cycle adjustment with error resiliencyIBM·Filed 2013·Granted Apr 5, 2016·3 cites·17 claims
- 2566US7886245B2Structure for optimizing the signal time behavior of an electronic circuit designIBM·Filed 2008·Granted Feb 8, 2011·4 cites·10 claims
- 2665US8937494B1Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuitIBM·Filed 2013·Granted Jan 20, 2015·1 cites·8 claims
- 2764US8522187B2Method and data processing system to optimize performance of an electric circuit design, data processing program and computer program productFRICKE NIELS·Filed 2011·Granted Aug 27, 2013·3 cites·14 claims
- 2861US10651834B2Method and apparatus for clock skew control with low jitter in an integrated circuitIBM·Filed 2019·Granted May 12, 2020·0 cites·20 claims
- 2961US10361689B2Static compensation of an active clock edge shift for a duty cycle correction circuitIBM·Filed 2017·Granted Jul 23, 2019·0 cites·6 claims
- 3060US11025239B2Static compensation of an active clock edge shift for a duty cycle correction circuitIBM·Filed 2019·Granted Jun 1, 2021·0 cites·12 claims
- 3159US10594307B2Skew sensor with enhanced reliabilityIBM·Filed 2018·Granted Mar 17, 2020·0 cites·17 claims
- 3259US10469063B2Method and apparatus for clock skew control with low jitter in an integrated circuitIBM·Filed 2019·Granted Nov 5, 2019·0 cites·20 claims
- 3359US10263606B2On-chip waveform measurementIBM·Filed 2017·Granted Apr 16, 2019·0 cites·2 claims
- 3458US11088684B2Calibrating internal pulses in an integrated circuitIBM·Filed 2018·Granted Aug 10, 2021·0 cites·20 claims
- 3558US10804889B2Double compression avoidanceIBM·Filed 2017·Granted Oct 13, 2020·0 cites·7 claims
- 3657US11176304B2Routing a cell of a semiconductor chipIBM·Filed 2019·Granted Nov 16, 2021·0 cites·20 claims
- 3757US10756714B2Skew controlIBM·Filed 2019·Granted Aug 25, 2020·0 cites·19 claims
- 3856US10622981B2Static compensation of an active clock edge shift for a duty cycle correction circuitIBM·Filed 2017·Granted Apr 14, 2020·0 cites·15 claims
- 3956US9953124B2Generating a layout for an integrated circuitIBM·Filed 2016·Granted Apr 24, 2018·0 cites·7 claims
- 4055US10581417B2Skew sensor with enhanced reliabilityIBM·Filed 2017·Granted Mar 3, 2020·0 cites·11 claims
- 4155US10312892B2On-chip waveform measurementIBM·Filed 2017·Granted Jun 4, 2019·0 cites·8 claims
- 4252US10298217B2Double compression avoidanceIBM·Filed 2017·Granted May 21, 2019·0 cites·7 claims
- 4351US11113446B2Yield improving leaf cells optimization for semiconductor netlistsIBM·Filed 2020·Granted Sep 7, 2021·0 cites·15 claims
- 4451US10892744B2Correcting duty cycle and compensating for active clock edge shiftIBM·Filed 2017·Granted Jan 12, 2021·0 cites·18 claims
- 4546US8949761B2Techniques for routing signal wires in an integrated circuit designIBM·Filed 2012·Granted Feb 3, 2015·0 cites·20 claims
- 4642US9754063B2Reducing dynamic clock skew and/or slew in an electronic circuitIBM·Filed 2015·Granted Sep 5, 2017·0 cites·20 claims
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